Max2114 dbs direct downconverter, Pin description – Rainbow Electronics MAX2114 User Manual

Page 6

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MAX2114

DBS Direct Downconverter

6

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Pin Description

PECL Modulus Control. A PECL high on MOD+ sets the dual-modulus prescaler to divide by 32. A PECL
logic low sets the divide ratio to 33. Drive with a differential PECL signal in conjunction with MOD- (pin 31).

MOD+

30

Local Oscillator Buffer Select. Connect to GND to select DIV32/33 prescaler output; connect V

CC

to

DIV1 to select DIV2 LO buffer output.

LOBUFSEL

14

V

CC

Power-Supply Input. Connect each pin to a +5V ±5% low-noise supply. Bypass each V

CC

pin to

the nearest GND with a ceramic chip capacitor.

V

CC

1, 6, 17,

27, 36, 41

Baseband In-Phase Output. Connect to noninverting input of high-speed ADC.

IOUT+

29

Baseband In-Phase Output. Connect to inverting input of high-speed ADC.

IOUT-

28

Baseband Quadrature Output. Connect to noninverting input of high-speed ADC.

QOUT+

26

Baseband Quadrature Output. Connect to inverting input of high-speed ADC.

QOUT-

25

RF Input Band Select Input. Drive high to enable 1680MHz to 2175MHz band. Leave unconnected to
enable 1180MHz to 1680MHz band. Connect to GND to enable 925MHz to 1180MHz band.

RFBAND

24

Baseband Filter Cutoff Adjust. Connect to a slew-rate-limited clock source. See AC Electrical
Characteristics
for transfer function.

FLCLK

23

Loopthrough Mode Enable. High-impedance digital input. Drive low to enable the RFOUT buffer and
disable the LO converters. Drive high for normal tuner operation.

INSEL

22

Gain Control Input for Baseband Signals. High-impedance analog input, with an input range of +1V to
+4V. See AC Electrical Characteristics for transfer function.

GC2

21

Gain Control Input for RF Front End. High-impedance analog input, with an input range of +1V to +4V.
See AC Electrical Characteristics for transfer function.

GC1

20

Charge-Pump Gain Select. High-impedance digital input. Sets the charge-pump output scaling. See
DC Electrical Characteristics for available gain settings.

CPG2

19

Buffered Crystal Oscillator Output

XTLOUT

18

Charge-Pump Gain Select. High-impedance digital input. Sets the charge-pump output scaling. See
DC Electrical Characteristics for available gain settings.

CPG1

16

Buffered RF Output. Enabled when INSEL is low.

RFOUT

15

Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from IDC+ to IDC- (pin 12).

IDC+

13

Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from IDC- to IDC+ (pin 13).

IDC-

12

Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from QDC+ to QDC- (pin 10).

QDC+

11

Baseband Offset Correction. Connect a 0.22µF ceramic chip capacitor from QDC- to QDC+ (pin 11).

QDC-

10

RF Noninverting Input. Connect to 75

Ω source with a 47pF ceramic chip capacitor.

RFIN+

8

RF Inverting Input. Bypass RFIN- with 47pF capacitor in series with a 75

Ω resistor to GND.

RFIN-

7

Ground. Connect each of these pins to a solid ground plane. Use multiple vias to reduce inductance
where possible.

GND

5, 9, 42

Noninverting Input to Crystal Oscillator. Consult crystal manufacturer for circuit loading requirements.

XTL+

4

Inverting Input to Crystal Oscillator. Consult crystal manufacturer for circuit loading requirements.

XTL-

3

External Bypass for Internal Bias. Bypass this pin with a 0.22

µF ceramic chip capacitor to GND.

CFLT

2

PIN

FUNCTION

NAME

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