Diodes ZVN3320F User Manual

Zvn3320f, Sot23 n-channel enhancement mode vertical dmos fet, Absolute maximum ratings

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SOT23 N-CHANNEL ENHANCEMENT

MODE VERTICAL DMOS FET

ISSUE 3 – DECEMBER 1995

FEATURES

*

200 Volt V

DS

*

R

DS(on)

= 25

PARTMARKING DETAIL – MU

ABSOLUTE MAXIMUM RATINGS.

PARAMETER

SYMBOL

VALUE

UNIT

Drain-Source Voltage

V

DS

200

V

Continuous Drain Current at T

amb

=25°C

I

D

60

mA

Pulsed Drain Current

I

DM

1

A

Gate-Source Voltage

V

GS

±

20

V

Power Dissipation at T

amb

=25°C

P

tot

330

mW

Operating and Storage Temperature Range

T

j

:T

stg

-55 to +150

°C

ELECTRICAL CHARACTERISTICS (at T

amb

= 25°C unless otherwise stated).

PARAMETER

SYMBOL MIN.

MAX.

UNIT CONDITIONS.

Drain-Source
Breakdown Voltage

BV

DSS

200

V

I

D

=1mA, V

GS

=0V

Gate-Source Threshold
Voltage

V

GS(th)

1.0

3.0

V

I

D

=1mA, V

DS

= V

GS

Gate-Body Leakage

I

GSS

100

nA

V

GS

=

±

20V, V

DS

=0V

Zero Gate Voltage
Drain Current

I

DSS

10
50

µ

A

µ

A

V

DS

=200V, V

GS

=0V

V

DS

=160V, V

GS

=0V,

T=125°C

(2)

On-State Drain Current(1)

I

D(on)

250

mA

V

DS

=25V, V

GS

=10V

Static Drain-Source On-State
Resistance (1)

R

DS(on)

25

V

GS

=10V,I

D

=100mA

Forward Transconductance(1)
(2)

g

fs

75

mS

V

DS

=25V,I

D

=100mA

Input Capacitance (2)

C

iss

45

pF

Common Source
Output Capacitance (2)

C

oss

18

pF

V

DS

=25V, V

GS

=0V, f=1MHz

Reverse Transfer Capacitance
(2)

C

rss

5

pF

Turn-On Delay Time (2)(3)

t

d(on)

5

ns

V

DD

25V, I

D

=100mA

Rise Time (2)(3)

t

r

7

ns

Turn-Off Delay Time (2)(3)

t

d(off)

6

ns

Fall Time (2)(3)

t

f

6

ns

(1) Measured under pulsed conditions. Width=300

µ

s. Duty cycle

2% (2) Sample test.

(3) Switching times measured with 50

source impedance and <5ns rise time on a pulse generator

ZVN3320F

D

G

S

SOT23

3 - 398

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