Diodes ZVNL120G - Manual

SOT223 N-CHANNEL ENHANCEMENT MODE
LOW THRESHOLD VERTICAL DMOS FET
ISSUE 2 - JANUARY 1996 ✪
FEATURES
* V
DS
- 200V
* R
DS(ON)
- 10 Ω
PARTMARKING DETAIL - ZVNL120
ABSOLUTE MAXIMUM RATINGS.
PARAMETER SYMBOL VALUE UNIT
Drain-Source Voltage V
DS
200 V
Continuous Drain Current at T
amb
=25°C I
D
320 mA
Pulsed Drain Current I
DM
2 A
Gate-Source Voltage V
GS
± 20 V
Power Dissipation at T
amb
=25°C P
tot
2 W
Operating and Storage Temperature Range T
j
:T
stg
-55 to +150 °C
ELECTRICAL CHARACTERISTICS (at T
amb
= 25°C unless otherwise stated).
PARAMETER SYMBOL MIN. MAX. UNIT CONDITIONS.
Drain-Source Breakdown
Voltage BV
DSS
200 V I
D
=1mA, V
GS
=0V
Gate-Source Threshold Voltage V
GS(th)
0.5 1.5 V I
D
=1mA, V
DS
= V
GS
Gate-Body Leakage I
GSS
100 nA V
GS
= ± 20V, V
DS
=0V
Zero Gate Voltage Drain
Current I DSS 10
100 µ A
µ A
V DS =200V, V GS =0V
V
DS
=160V, V
GS
=0V,
T=125°C (2)
On-State Drain Current(1) I
D(on)
500 mA V
DS
=25V, V
GS
=5V
Static Drain-Source On-State
Resistance (1) R DS(on) 10
10 Ω
Ω
V GS =5V, I D =250mA
V
GS
=3V, I
D
=125mA
Forward Transconductance(1)(2) g
fs
200 mS V
DS
=25V, I
D
=250mA
Input Capacitance (2) C
iss
85 pF
Common Source Output
Capacitance (2) C
oss
20 pF V
DS
=25V, V
GS
=0V, f=1MHz
Reverse Transfer Capacitance (2) C
rss
7 pF
Turn-On Delay Time (2)(3) t
d(on)
8 ns
V
DD
≈ 25V, I
D
=250mA
Rise Time (2)(3) t
r
8 ns
Turn-Off Delay Time (2)(3) t
d(off)
20 ns
Fall Time (2)(3) t
f
12 ns
(1) Measured under pulsed conditions. Width=300 µ s. Duty cycle ≤ 2% (2) Sample test.
(3) Switching times measured with 50 Ω source impedance and <5ns rise time on a pulse generator
ZVNL120G
3 - 420
D
D
S
G