Zxld1371, Applications information – Diodes ZXLD1371 User Manual

Page 36

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ZXLD1371

ZXLD1371

Document number: DS35436 Rev. 1 - 2

36 of 42

www.diodes.com

February 2012

© Diodes Incorporated

A Product Line of

Diodes Incorporated

Applications Information

(cont.)

FLAG/STATUS Outputs

The FLAG/STATUS outputs provide a warning of extreme operating or fault conditions. FLAG is an open-drain logic
output, which is normally off, but switches low to indicate that a warning, or fault condition exists. STATUS is a DAC
output, which is normally high (4.5V), but switches to a lower voltage to indicate the nature of the warning/fault.

Conditions monitored, the method of detection and the nominal STATUS output voltage are given in the following table
(Note 15):

Table 2

Warning/Fault condition

Severity

(Note 16)

Monitored

parameters

FLAG

Nominal STATUS voltage

Normal operation

H 4.5V

Supply under-voltage

1

V

AUX

< 5.0V

L 4.5V

2

V

IN

< 5.6V

L <

3.6V

Output current out of regulation
(Note 17)

2

V

SHP

outside normal

voltage range

L 3.6V

Driver stalled with switch ‘on’, or
‘off’ (Note 18)

2

t

ON

, or t

OFF

> 100µs

L 3.6V

Device temperature above
maximum recommended
operating value

3

T

J

> 125°C

L 1.8V

Sense resistor current I

RS

above

specified maximum

4

V

SENSE

> 0.3V

L 0.9V

Notes:

15. These STATUS pin voltages apply for an input voltage,V

IN

, of 7.5V < V

IN

< 60V. Below 7.5V the STATUS pin voltage levels reduce and therefore

may not report the correct status. For 5.4V < V

IN

< 7.5V the flag pin still reports an error by going low. At low V

IN

in Boost and Buck-boost modes

an over-current status may be indicated when operating at high boost ratios -– this due to the feedback loop increasing the sense voltage.

16. Severity 1 denotes lowest severity.

17. This warning will be indicated if the output power demand is higher than the available input power; the loop may not be able to maintain

regulation.

18. This warning will be indicated if the gate pin stays at the same level for greater than 100µs (e.g. the output transistor cannot pass enough current

to reach the upper switching threshold).

Figure 15. Status levels

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