Diodes ZXBM1016 - Manual (Page 8)

ZXBM1016
Issue 1 - February 2007 8 www.zetex.com
© Zetex Semiconductors plc 2007
C
INT
- Integrator timing capacitor
A capacitor is connected from this pin to ground. It is used to store a signal that is proportional
to the commutation period. The stored signal is a representation of the motor speed and is used
by the tail-end control circuitry. It will normally be the same value as that applied to the C
LCK
pin.
Range - Speed range setting pin
The ZXBM1016 is designed to operate over a predefined dynamic range. This will normally be in
excess of 10:1 i.e. the lowest speed will be 1/10 of the full speed. In some instance the speed range
might be 200rpm to 2,000rpm yet in others it could be 1,000 to 10,000rpm. This pin allows the tail-
end current control operation to be tuned to the desired speed range. To do this a resistor is
attached between the range pin and the ThRef pin.
The following graph gives a range of resistor values against the speed range.
Typically a 220k
⍀ resistor will cover most mid speed range motors of 600rpm to 6,000rpm,
however a lower value can be used to enable the motor to be run at higher speeds. Conversely a
higher value will be needed for motors running at a lower speed range.
CPWM - Sets PWM frequency
This pin has an external capacitor attached to set the PWM frequency for the phase drive outputs.
A capacitor value of 0.1nF will provide a PWM frequency of typically 25kHz.
FG - Frequency generator (speed)
This is the frequency generator output and is a buffered signal from the Hall sensor.
This is an open collector drive giving an active pull down with the high level being provided by
an external pull up resistor.
Ph1Lo and Ph2Lo - Low-side external H-bridge driver
These pair of outputs drive the low side of the external power device H-bridge that in turn drives
the single phase winding. These outputs provide both the commutation and PWM waveforms.
The outputs are active pull-up and active pull-down to help faster switching off when driving
MOSFET devices with a high gate capacitance. When in the high state the outputs will provide up
to 80mA of drive into the base or gates of external transistors as shown in the typical application
circuit shown on the front page.
When in the low state the active phase drive is again capable of sinking up to 80mA to aid turn
off times during PWM operation. When the phase is inactive the output is held low by a 7.5k
⍀
internal pull-down resistor.
0 2000 4000 6000 8000 10000
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
220k Ω
470k Ω
120k Ω
360k Ω
Speed vs C
LCK
peak voltage
C
LCK
peak voltage (V)
Speed (rpm)
750k Ω
R Range
C LCK = 0.47 μF