Diodes ZNBG3118 - Manual (Page 2)

ZNBG3118
ZNBG3118
Document number: DS32049 Rev. 2 - 2
2 of 10
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February 2010
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Device Description
The ZNBG series of devices are designed to meet the bias
requirements of GaAs and HEMT FETs commonly used in
satellite receiver LNBs with a minimum of external
components.
With the addition of two capacitors and a resistor the devices
provide drain voltage and current control for three external
grounded source FETs, generating the regulated negative
rail required for FET gate biasing whilst operating from a
single supply. This negative bias, at -2.5 volts, can also be
used to supply other external circuits.
The ZNBG3118 includes bias circuits to drive up to three
external FETs. The voltage applied to the V
POL
pin
determines which one of first two FETs is operational, the
third FET is permanently active. This feature is normally
used as an LNB polarisation switch to select the required
polarisation. Specific to Universal LNB applications is the
oscillator band select. This is achieved by detecting a 22kHz
tone which enables or disables the relevant local oscillator.
The ZNBG3118 has been designed to control various
oscillators and down converter designs including Discrete
(Bi-polar or MOSFET), MIMIC oscillators and IF amplifier /
down-converters IC’s with logic enabled phase lock loop
(PLL) oscillators.
The ZNBG3118 has been designed to cope with DiSEqC™
ready set top boxes and rejects transients from channel
switching.
Drain current setting of the ZNBG3118 is user selectable over
the range 0 to 15mA, achieved with addition of a single
resistor. The drain voltage for all the FET’s is set internally to
2 volts. To minimise the pin out and package size FET 1 and
FET 2 share a common drain pin.
These devices are unconditionally stable over the full working
temperature with the FETs in place, subject to the inclusion of
the recommended gate and drain capacitors. These ensure
RF stability and minimal injected noise.
It is possible to use less than the devices full complement of
FET bias controls, unused drain and gate connections can be
left open circuit without affecting operation of the remaining
bias circuits.
To protect the external FETs the circuits have been designed
to ensure that, under any conditions including power up/down
transients, the gate drive from the bias circuits cannot exceed
-3V. Additionally each stage has its own individual current
limiter. Furthermore if the negative rail experiences a fault
condition, such as overload or short circuit, the drain supply to
the FETs will shut down avoiding excessive current flow.
To minimise PCB space ZNBG3118 is packaged in the 16 pin
3mm x 3mm QFN package.
Device operating temperature is -40 to 85°C to suit a wide
range of environmental conditions.