Diodes ZABG4002 - Manual (Page 3)

ZABG4002
ZABG4002
Document number: DS32047 Rev. 2 - 2
3 of 7
www.diodes.com
February 2010
© Diodes Incorporated
NEW PROD
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T
A Product Line of
Diodes Incorporated
Maximum Ratings
Parameter Rating Unit
Supply Voltage -0.6 to +10 V
Supply Current 80 mA
Power Dissipation 500 mW
Operating Temperature Range -40 to +85 °C
Storage Temperature Range -40 to +150 °C
Electrical Characteristics
(Measured at T
AMB
= 25°C, V
CC
= 3.3V (note 1), R
CAL
1 = R
CAL
2 = 39k (setting I
D
to 10mA) unless otherwise stated)
Parameter Conditions Symbol Min. Typ. Max. Unit
Operating Voltage Range
(note 1)
V
CC
3.0 8.0 V
Supply Current
I
D1
= I
D2
= I
D3
= I
D4
= 0 I
CC
1.2 4.0 mA
I
D1
= I
D2
= I
D3
= I
D4
= 10mA I
CC(L)
42 44 mA
Substrate Voltage
I
CSUB
= 0 V
CSUB
-3.0 -2.65 -2.0 V
I
CSUB
= -200uA V
CSUB(L)
-2.55 -2.0 V
Oscillator Frequency F
OSC
150 240 600 kHz
Gate Characteristics
Gate (G1 to G4)
Current Range
I
G
-100 +500 uA
Voltage Low I
D
= 12mA, I
G
= -10uA V
G(L)
-3.0 -2.5 -2.0 V
Voltage High I
D
= 8mA, I
G
= 0 V
G(H)
0 0.7 1.0 V
Voltage Disabled
I
D
= 0, I
G
= -10uA,
V
RCAL
= 3.0V
V
G(DIS)
-3.0 -2.5 -2.0 V
Drain Characteristics
Drain (D1 to D4)
Current Range
I
D
0 15 mA
Current Operating Standard Application Circuit I
D(OP)
8 10 12 mA
Current Disabled V
D
= 0, V
RCAL
= 3.0V I
D(DIS)
10 uA
Voltage Operating I
D
= 10mA V
D(OP)
1.8 2.0 2.2 V
delta I
D
vs V
CC
V
CC
= 3.3 to 8.0V dI
D
/dV
CC
1.2 %/V
delta I
D
vs T
OP
T
OP
= -40°C to +85°C dI
D
/dT
OP
0.05 %/°C
delta V
D
vs V
CC
V
CC
= 3.3 to 8.0V dV
D
/dV
CC
0.05 %/V
delta V
D
vs T
OP
T
OP
= -40°C to +85°C dV
D
/dT
OP
50 ppm/°C
R
CAL
(1 and 2)
Disable Threshold V
RCAL(DIS)
1.8 2.7 3.0 V
Input Current V
RCAL
= 3.0V I
RCAL(DIS)
1.7 10 uA
Output Noise
Drain Voltage
C
GATE-GND
= 10nF,
C
DRAIN-GND
= 10nF
V
D(NOISE)
0.02 Vpk-pk
Gate Voltage
C
GATE-GND
= 10nF,
C
DRAIN-GND
= 10nF
V
G(NOISE)
0.005 Vpk-pk
Notes: 1. The two Vcc pins are internally connected, only one of the pins needs to be powered for the device to function. See applications section for further
information.
2. ESD sensitive, handling precautions are recommended.
3. The negative bias voltages are generated on-chip using an internal oscillator. Two external capacitors, C
NB
and C
SUB
of value 47nF are required for this
purpose.
4. The package (QFN1633) exposed pad must either be connected to Csub or left open circuit.
5. The characteristics are measured using two external reference resistors R
CAL1
and R
CAL2
of value 39k , wired from pins R
CAL1/2
to ground. Resistor R
CAL1
sets the drain current of FETs 1 and 3, resistor R
CAL2
sets the drain currents of FETs 2 and 4.
6. Noise voltage measurements are made with FETs and gate and drain capacitors of value 10nF in place. Noise voltages are not measured in production.