Diodes AP2141D/ AP2151D - Manual (Page 4)

AP2141D/ AP2151D
Document number: DS32242 Rev. 4 - 2
4 of 18
www.diodes.com
May 2013
© Diodes Incorporated
AP2141D/ AP2151D
Electrical Characteristics
(@T
A
= +25°C, V
IN
= +5V, unless otherwise specified.)
Symbol Parameter Test Conditions Min Typ Max Unit
V
UVLO
Input UVLO 1.6 1.9 2.5 V
I
SHDN
Input Shutdown Current Disabled, I
OUT
= 0 0.5 1 µA
I
Q
Input Quiescent Current Enabled, I
OUT
= 0 45 70 µA
I
LEAK
Input Leakage Current Disabled, OUT grounded 0.1 1 µA
I
REV
Reverse Leakage Current Disabled, V
IN
= 0V, V
OUT
= 5V, I
REV
at V
IN
0.1 1 µA
R DS(ON)
Switch On-Resistance
V
IN
= 5V,
I OUT = 0.5A
T
A
= +25°C
SOT25, MSOP-8,
MSOP-8EP, SO-8
95 115
m Ω
U-DFN2018-6 90 110
-40°C ≤ T
A
≤ +85°C 140
V
IN
= 3.3V, I
OUT
=
0.5A
T
A
= +25
C
120 140
-40°C ≤ T
A
≤ +85°C 170
I
SHORT
Short-Circuit Current Limit Enabled into short circuit, C
L
= 22µF 0.6 A
I
LIMIT
Over-Load Current Limit V
IN
= 5V, V
OUT
= 4.0V, C
L
= 120µF, -40°C ≤ T
A
≤ +85°C 0.6 0.8 1.0 A
I
TRIG
Current limiting trigger threshold Output Current Slew Rate (<100A/s) , C
L
= 22µF 1.0 A
I
SINK
EN Input leakage V
EN
= 5V 1 µA
t
D(ON)
Output turn-on delay time C
L
= 1µF, R
LOAD
= 10 Ω 0.05 ms
t
R
Output turn-on rise time C
L
= 1µF, R
LOAD
= 10 Ω 0.6 1.5 ms
t
D(OFF)
Output turn-off delay time C
L
= 1µF, R
LOAD
= 10 Ω 0.05 ms
t F
Output turn-off fall time C L = 1µF, R LOAD = 10 Ω 0.05 0.1 ms
R
FLG
FLG output FET on-resistance I
FLG
=10mA 20 40 Ω
t
BLANK
FLG blanking time C
IN
= 10µF, C
L
= 22µF 4 7 15 ms
R
DIS
Discharge resistance (Note 5) V
IN
= 5V, disabled, I
OUT
= 1mA 100 Ω
t
DIS
Discharge Time C
L
= 1µF, V
IN
= 5V, disabled to V
OUT
< 0.5V 0.6 ms
T
SHDN
Thermal Shutdown Threshold Enabled, R
LOAD
= 1k Ω 140 C
T
HYS
Thermal Shutdown Hysteresis 25 C
θ
JA
Thermal Resistance Junction-to-
Ambient
SOT25 (Note 6) 170
°C/W
SO-8 (Note 6) 127
MSOP-8EP (Note 7) 67
U-DFN2018-6 (Note 7) 70
Notes: 5. The discharge function is active when the device is disabled (when enable is de-asserted). The discharge function offers a resistive discharge path
for the external storage capacitor.
6. Device mounted on FR-4 substrate PCB, 2oz copper, with minimum recommended pad layout.
7. Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper, with minimum recommended pad on top layer and thermal vias to bottom layer ground
plane.