Data sheet, Pin configuration, Pin description – Diodes AP2129 User Manual
Page 2
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300mA HIGH SPEED, EXTREMELY LOW NOISE CMOS LDO REGULATOR AP2129
Data Sheet
2
Sep. 2012 Rev. 1. 6
BCD Semiconductor Manufacturing Limited
Figure 2. Pin Configuration of AP2129 (Top View)
Pin Configuration
K Package
(SOT-23-5)
V
IN
GND
V
OUT
ADJ/NC
Shutdown
1
2
3
4
5
DN Package
(DFN-1.5x2-6)
Shutdown
V
IN
GND
V
OUT
NC
NC
Pin Description
Pin Number
Pin Name
Function
DFN-1.5x2-6
SOT-23-5
1
3
V
IN
Input Voltage
2
2
GND
Ground
3
1
Active High Enable Input Pin. Logic high=enable, logic low=shut-
down
4, 5
NC
No Connection
5
ADJ/NC
Adjust Output for ADJ version/No Connection for Fixed Version
6
4
V
OUT
Regulated Output Voltage
Shutdown
Pin 1 Mark
1
2
3
4
5
6
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