Ap7217, 500ma cmos ldo, Electrical characteristics – Diodes AP7217 User Manual

Page 4

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AP7217

500mA CMOS LDO

AP7217

Document number: DS31292 Rev. 4 - 2

4 of 10

www.diodes.com

April 2010

© Diodes Incorporated

Electrical Characteristics

(V

IN

= 12V, T

A

= +25°C, unless otherwise noted)

(T

A

= 25

°C, C

IN

= 1µF, C

OUT

= 1µF, V

EN

= V

IN

, unless otherwise noted)

Symbol

Parameter

Test Conditions

Min

Typ.

Max

Unit

I

Q

Quiescent

Current

I

O

= 0mA

-

50

70

μA

I

STB

Standby

Current

V

EN

= Off

V

IN

= 5.0V

15

30

μA

VR

OUT

Output Voltage Accuracy I

O

= 30mA, V

IN

=

5V

3.234 3.300 3.366

V

VR

OUT

Temperature

Coefficient

-40

°C to 85°C, I

OUT

= 30mA

±100

ppm /

o

C

V

DROPOUT

Dropout

Voltage

I

OUT

= 100mA

100

250

mV

I

OUT

Maximum Output

Current

V

IN

= 5.3V

500

mA

I

LIMIT

Current

Limit

V

IN

=

5.3V

600 mA

I

short

Short

Circuit

Current

V

IN

= 5.3V

50

mA

ΔV

LINE

/

ΔV

IN

/VR

OUT

Line Regulation

4.3V

≤ V

IN

≤ 5.5V; I

OUT

= 30mA

0.01

±0.2

%/V

ΔVR

OUT

Load

Regulation

1mA

≤ I

OUT

≤ 100mA, V

IN

= 5.3V

15

50

mV

PSRR

Power Supply Rejection

V

IN

= 4.3V+ 0.5Vp-

pAC,

I

OUT

= 50mA

F= 1KHz

55

dB

V

EH

EN Input Threshold

Output ON

1.6

V

V

EL

Output

OFF

0.25

V

I

EN

Enable Pin Current

-0.1

0.1

μA

V

DF

Detect fall voltage

3.83

3.91

3.98

V

V

Hysteresis

V

D

Hysteresis Range

V

DF

x1.02

V

DF

x1.05

V

DF

x1.08

V

IVD

OUT

VD Supply Current

VD

OUT

= 0.5V

V

IN

= 2.0V

3.0V

20

30

mA

t

RP

V

DOUT

Delay Time

V

IN

= 1.8V to VDF+ 1V

10

20

40

mSec

θ

JA

Thermal Resistance

Junction to Ambient

SOP-8L

(Note

2)

134 ºC/W

θ

JC

Thermal Resistance

Junction to Case

SOP-8L (Note 2)

28

ºC/W

Notes: 2. Test conditions for SOP-8L: Devices mounted on FR-4 PC board, MRP, 2oz copper layout, calibrate at T

J

=150 ºC, measure at

T

A

=25ºC, minimum recommended pad layout



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