Diodes AL8807 - Manual (Page 3)

AL8807
Document number: DS35281 Rev. 5 - 2
3 of 20
www.diodes.com
March 2013
© Diodes Incorporated
AL8807
Electrical Characteristics
(@V
IN
= 12, T
A
= +25°C, unless otherwise specified.)
Symbol Parameter Conditions Min Typ Max Unit
V
INSU
Internal Regulator Start-Up Threshold V
IN
rising 5.9 V
V
INSH
Internal Regulator Hysteresis Threshold V
IN
falling 100 300 mV
I
Q
Quiescent Current Output not switching (Note 4) 350 µA
I S
Input Supply Current CTRL pin floating f = 250kHz 1.8 5 mA
V
TH
Set current Threshold Voltage 95 100 105 mV
V
TH-H
Set Threshold Hysteresis ±20 mV
I
SET
SET Pin Input Current V
SET
= V
IN
-0.1 16 22 µA
R
CTRL
CTRL Pin Input Resistance Referred to internal reference 50 k Ω
V
REF
Internal Reference Voltage 2.5 V
R
DS(on)
On Resistance of SW MOSFET I
SW
= 1A 0.25 0.4 Ω
t R
SW Rise Time V
SENSE
= 100±20mV, f
SW
= 250kHz
V
SW
= 0.1V to 12V to 0.1V, C
L
= 15pF
12 ns
t
F
SW Fall Time 20 ns
I
SW_Leakage
Switch Leakage Current V
IN
=30V 0.5 μA

JA
Thermal Resistance Junction-to-Ambient (Note 5)
SOT25 (Note 6) 250
C/W MSOP-8EP (Note 7) 69

JL
Thermal Resistance Junction-to-Lead (Note 8) SOT25 (Note 6) 50

JC
Thermal Resistance Junction-to-case (Note 9) MSOP-8EP (Note 7) 4.3
Notes: 4. AL8807 does not have a low power standby mode but current consumption is reduced when output switch is inhibited: V
SENSE
= 0V. Parameter is
tested with V
CTRL
≤ 2.5V
5. Refer to figure 35 for the device derating curve.
6. Test condition for SOT25: Device mounted on FR-4 PCB (25mm x 25mm 1oz copper, minimum recommended pad layout on top layer and thermal
vias to bottom layer ground plane. For better thermal performance, larger copper pad for heat-sink is needed.
7. Test condition for MSOP-8EP: Device mounted on FR-4 PCB (51mm x 51mm 2oz copper, minimum recommended pad layout on top layer and
thermal vias to bottom layer with maximum area ground plane. For better thermal performance, larger copper pad for heat-sink is needed
8. Dominant conduction path via Gnd pin (pin 2).
9. Dominant conduction path via exposed pad.