Diodes 74LVCE1G125 - Manual (Page 7)

74LVCE1G125
SINGLE BUFFER GATE WITH 3-STATE OUTPUT
74LVCE1G125
Document number: DS32216 Rev. 2 - 2
7 of 14
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December 2010
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UC
T
Parameter Measurement Information
Vcc
Inputs
V
M
C
L
R
L
V
I
t
r
/t
f
1.5V±0.1V V
CC
≤2ns V
CC
/2 15pF 1M Ω
1.8V±0.15V V
CC
≤2ns V
CC
/2 15pF 1M Ω
2.5V±0.2V V
CC
≤2ns V
CC
/2 15pF 1M Ω
3.3V±0.3V 3V ≤2.5ns 1.5V 15pF 1M Ω
5V±0.5V V
CC
≤2.5ns V
CC
/2 15pF 1M Ω
Voltage Waveform Enable and Disable Times
Low and High Level Enabling
Voltage Waveform Pulse Duration
Voltage Waveform Propagation Delay Times
Inverting and Non Inverting Outputs
Notes: A. Includes test lead and test apparatus capacitance.
B. All pulses are supplied at pulse repetition rate ≤ 10 MHz.
C. Inputs are measured separately one transition per measurement.
D. t
PLZ
and t
PHZ
are the same as t
dis.
E. t
PZL
and t
PZH
are the same as t
EN.
F. t
PLH
and t
PHL
are the same as t
PD.
Figure 1. Load Circuit and Voltage Waveforms
TEST S1
t
PLH
/t
PHL
Open
t
PLZ
/t
PZL
Vload
t
PHZ
/t
PZH
GND