IEI Integration ICE-DB-9S - Manual (Page 51)

ICE Module
Page 38
Preferred Routing
Alternative Routing
Bad Routing
Preferred Routing
Preferred Routing
Figure 4-4: PEG Layout Trace Example
4.2 PCI Express
PCI Express provides a scalable, high-speed, serial I/O point-to-point bus connection.
A PCI Express lane consists of dual simplex channels, each implemented as a
low-voltage differentially driven transmit pair and receive pair. They are used for
simultaneous transmission in each direction. The bandwidth of a PCI Express link can
be scaled by adding signal pairs to form multiple lanes between two devices. The PCI
Express specification defines x1, x4, x8, x16, and x32 link widths. Each single lane
has a raw data transfer rate of 2.5Gbps @ 1.25GHz.