Document Outline

• ICE Module Carrier Board Design Guide
  • 1 Introduction
    • 1.1 Introduction
    • 1.2 Acronyms and Abbreviations Definition
    • 1.3 Reference Documents
  • 2 ICE Module Overview
    • 2.1 Chapter Overview
    • 2.2 ICE Specifications
      • 2.2.1 ICE-9152-R10
      • 2.2.2 ICE-9102-1GZ-R10
      • 2.2.3 ICE-9102-1G512-R10
      • 2.2.4 ICE-ATOM-R10
      • 2.2.5 ICE-GM45A-R10
      • 2.2.6 ICE-DB-9S-R10
    • 2.3 Performance
  • 3 Pin Assignments
    • 3.1 Chapter Overview
    • 3.2 Type 1, Type 2, Type 3, Type 4 and Type 5
    • 3.3 Signal Table Terminology
    • 3.4 Connector Pinout Row A and Row B
    • 3.5 Connector Pinout Rows C and D
  • 4 Signal Description and Routing Guideline
    • 4.1 PEG (PCI Express Graphic)
      • 4.1.1 Signal Description
      • 4.1.2 PEG Connector
      • 4.1.3 SDVO
      • 4.1.4 PEG_ENABLE#
      • 4.1.5 PCI Express Test Points and Probing
      • 4.1.6 PCI Express Routing Guideline
        • 4.1.6.1 Impedance Consideration
        • 4.1.6.2 AC Coupling Capacitors
        • 4.1.6.3 Routing Notices
    • 4.2 PCI Express
      • 4.2.1 Signal Description
      • 4.2.2 PCI Express Slot X1
      • 4.2.3 Express Card Connector
      • 4.2.4 PCIe Mini Card
      • 4.2.5 PCI Express Clock Buffer
        • 4.2.5.1 PCI Express Routing Guideline
    • 4.3 PCI
      • 4.3.1 Signal Description
      • 4.3.2 PCI Connector
      • 4.3.3 PCI IRQ Assignment
      • 4.3.4 PCI Clock Buffer
      • 4.3.5 PCI Routing Guideline
    • 4.4 SATA (Serial ATA Interface)
      • 4.4.1 Signal Description
      • 4.4.2 SATA Connector
      • 4.4.3 SATA LED#
      • 4.4.4 SATA Routing Guideline
    • 4.5 Universal Serial Bus (USB)
      • 4.5.1 Signal Description
      • 4.5.2 USB Keyed Connector Protocol
      • 4.5.3 ESD/EMI
      • 4.5.4 Over Current Protection
      • 4.5.5 Reference Schematics
      • 4.5.6 USB Routing Guideline
        • 4.5.6.1 Impedance
        • 4.5.6.2 General Routing and Placement
    • 4.6 LVDS
      • 4.6.1 Signal Description
      • 4.6.2 LVDS Cable Consideration
      • 4.6.3 Backlight and LCD Power Timing Control
      • 4.6.4 LVDS Routing Guideline
        • 4.6.4.1 Impedance
        • 4.6.4.2 Implement
    • 4.7 Audio Codec Interface(AC’97/HDA)
      • 4.7.1 Signal Description
    • 4.8 Reference Circuit
      • 4.8.1 Audio Routing Guideline
        • 4.8.1.1 Analog Power Delivery
        • 4.8.1.2 Digital and Analog Signals Isolation
        • 4.8.1.3 EMI Consideration
    • 4.9 IDE
      • 4.9.1 Signal Description
      • 4.9.2 IDE Connector
      • 4.9.3 CF Connector
    • 4.10 TV-Out
      • 4.10.1 Signal Description
      • 4.10.2 TV-Out Routing Guideline
        • 4.10.2.1 Signal Termination
        • 4.10.2.2 Video Filter
        • 4.10.2.3 ESD Protection
        • 4.10.2.4 Reference Schematic
    • 4.11 LAN (Local Area Network)
      • 4.11.1 Signal Description
      • 4.11.2 Giga LAN Connector
      • 4.11.3 LAN Link Activity and Speed LED
      • 4.11.4 LAN Routing Guideline
        • 4.11.4.1 Impedance
        • 4.11.4.2 LAN Ground Plane Separation
    • 4.12 LPC (Low Pin Count Interface)
      • 4.12.1 Signal Description
      • 4.12.2 Clock and Reset Buffer
      • 4.12.3 LPC SuperIO for Legacy IO Support
        • 4.12.3.1 Keyboard/Mouse
        • 4.12.3.2 RS-232/Floppy/LPT/IR
    • 4.13 VGA
      • 4.13.1 Signal Description
      • 4.13.2 VGA Connector
      • 4.13.3 VGA DAC Filter
      • 4.13.4 Routing Guide Line
        • 4.13.4.1 HSYNC and VSYNC Signals
        • 4.13.4.2 ESD
        • 4.13.4.3 DDC Interface
      • 4.13.5 VGA Reference Design
    • 4.14 Miscellaneous
      • 4.14.1 Signal Description
      • 4.14.2 Speaker/FAN Control/RTC Reference
        • 4.14.2.1 Speaker Out
        • 4.14.2.2 FAN Control
        • 4.14.2.3 RTC
  • 5 PCB Stack and Power Deliver Design
    • 5.1 Chapter Overview
    • 5.2 Microstrip or Stripline
    • 5.3 PCB Stackup Example
      • 5.3.1 Four-Layer Stack-up
      • 5.3.2 Six-Layer Stack-up
    • 5.4 ATX Power Delivery Guidelines
      • 5.4.1 ATX Power Status (S0,S3,S4,S5,G3)
      • 5.4.2 ATX Power Diagram
      • 6.3.3 ATX Power On Timing
    • 5.5 AT Power Delivery Guideline
      • 5.5.1 AT Power Diagram
      • 5.5.2 AT Power On Timing
  • 6 Mechanical Design Guidelines
    • 6.1 Chapter Overview
    • 6.2 COM Module and Carrier Board Connector
      • 6.2.1 Module Connector
      • 6.2.2 Carrier Board Connector
    • 6.3 Connector Footprint
    • 6.4 COM Express Form Factors
    • 6.5 Heat Spread
    • 6.6 Design Notes
      • 6.6.1 Component Height — Module Back and Carrier Board Top
      • 6.6.2 Air Follow Issue
      • 6.6.3 Grounding Issue
    • 6.7 Others Kits Specification
      • 6.7.1 Heat Sink
  • A ICE Module Design Schematic Check List
  • B Application Notes
    • B.1 Terminology
    • B.2 Updating BIOS Version
      • B.2.1 Using AFUWIN
      • 6.7.2 Using DOS Command
    • A.1 RTC Overview
      • A.1.1 How to Calculate the Battery Life
  • B Reference Carrier Board Schematic