Elitegroup A960M-M3 (V1.0) - Manual (Page 39)

Chapter 3
A960M-M3 USER MANUAL
35
CPU Configuration
The item in the menu shows the CPU.
Max Speed (3600 MHz) Intended Speed (3600 MHz)
This item shows the maximum speed of the CPU.
Microcode Patch Level (6000624)
This item shows the Microcode revision.
L1 Instruction Cache (64KB/2-way)
This item shows CPU L1 Instruction Cache.
L1 Data Cache (16KB/4-way)
This item shows CPU L1 Data Cache.
L2 Cache (2048 KB/16-way)
This item shows CPU L2 Cache.
AMD C&Q (Enabled)
This item enables or disables the CPU C&Q Function.
CPU Configuration
Socket0: AMD FX(tm)-4100 Quad-Core Processor
Max Speed: 3600 MHZ Intended Speed: 3600 MHZ
Microcode Patch Level: 6000624
--Information de cachette par noyau --
L1 Instruction Cache: 64 KB/2-way
L1 Data Cache: 16KB/4-way
L2 Cache: 2048 KB/16-way
Total L3 Cache per Socket : 8 MB/64-way
AMD C&Q [Enabled]
Core Performance Boost [Enabled]
Core C6 State [Enabled]
Enhanced Halt(C1E) [Disabled]
SB Clock Spread Spectrum [Disabled]
Aptio Setup Utility - Copyright (C) 2011 American Megatrends, Inc.
Version 2.14.1219. Copyright (C) 2011 American Megatrends, Inc.
Enable/disable C6
Enter/Dbl Click : Select
+/- : Change Opt.
lk
mn
: Select Screen
/Click: Select Item
F1: General Help
F2: Previous Values
F3: Optimized Defaults
F4: Save & Exit
ESC/Right Click: Exit
Main Advanced Chipset M.I.B.III Boot Security Exit
Press <Esc> to return to the Advanced Menu page.
Total L3 Cache per Socket : 8 MB/64-way
This item shows CPU L3 Cache.
Enhanced Halt (C1E) (Disabled)
Use this item to enable the CPU energy-saving function when the system is not run-
ning.
SB Clock Spread Spectrum (Disabled)
This item enables or disables the SB Clock Spread Spectrum.
Core C6 State (Enabled)
This item enables or disables the C6 mode.
Core Performance Boost (Enabled)
This item is used to set the CPB mode.