System block diagram, Ver: scver: scver: scver: sc, Ati ixp150 – Aspire Digital 1620 User Manual

Page 12: Ati rc300m, Intel c p u, Ddr*2, Dt northwood, Dt prescott, Chapter 1 3, Ati m11

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Chapter 1

3

System Block Diagram

A

A

B

B

C

C

D

D

E

E

4

4

3

3

2

2

1

1

DDR*2

ATI

IXP150

LPC

BUS

PCI

BUS

ATI

RC300M

CLK

GEN

.

ICS951402AGT

FSB

400/533/800MHz

ALIK

I/F

66MHz

KBC

M38857

PC8739

2

NS

SIO

DEBUG

CONN.

LPC

3

4, 5

6,7,8,9,10

11,12

16,17,18,19

32

32

33

34

PIDE

MDC

Ca

r

d

G142

1

OP

AM

P

31

22

MODEM/

B

T

YUHINA 4 serial Block YUHINA 4 serial Block YUHINA 4 serial Block YUHINA 4 serial Block

DiagramDiagramDiagramDiagram

INT.SP

K

R

Mini-P

C

I

802.11A

/B/G

Intel C

P

U

DT

Northwood

CD

RO

M

21

SIDE

266/333/400MHz

31

Project

code:

91.42E01.001

PCB

P/N

:

48.40I01.0SC

PCB

Version

:

03245-SC

CARDBU

S

TWO

SLOT

CARDBU

S

PCI

1520

GHK

PWR

S

W

TPS2224A

26

27

27

25/B/1

Realte

k

RTL810

0

C

26/A/4

AC'97

CODEC

AC-Lin

k

30

ALC65

5

G768

D

Therma

l

DT

Prescott

23

20

ATA100

LPC

4MB

SST49LF040

21/B/2

USB

2.0

VER: SCVER: SCVER: SCVER: SC

ATI

M11

VRAM*

4

K4D263238E-GC36

16MB

*4

BGA

1M*32bit*4banks

AGP

BUS

66MHz

SWITC

H

Daughter

Card

21

CRT

TV

OU

T

LCD

13

14

FAN

*

2

31

Line

O

u

t

31

Line

I

n

MIC

I

n

SMBUS

RJ45

24

10/100Mb

33MHz

25

33MHz

HDD

21

USBx

4

22

USB

2.0

PRN

Port

29

FIR

28

FDD

21

Touch

Pad

33

33

INT

KB

33

PS/2

Debug

con

INVERTE

R

14

AD

CON

N

43

BAT

CON

N

Micro-

P

ATTINY12L-4SI

42

35

45

Power

Bu

tton

EMI

L1:

L6:

L4:

L5:

L2:

L3:

VCC/GND

Signal

3

Signal

1

Signal

2

GND

Signal

4

PCB

LAY

E

R

41

OUTPUTS

INPUTS

BT+

MAX1909

DCBATOUT

UP+5V

18V

4.0A

MAXIM

CHA

RGER

5V

100mA

39,40

CPU

DC/

D

C

+VCC_CORE

DCBATOUT

+VID

1.2V

0.3A

1.3V

78A

ISL6247CR

INPUTS

OUTPUTS

INPUTS

SYSTEM

DC/DC

3D3V_S5

TPS5102

0DBT

5V_S5

38

OUTPUTS

DCBATOUT

5V_S3

5V_S0

3D3V_S3

3D3V_S0

1D5V_S0

37

DCBATOUT

2D5V_S5

INPUTS

OUTPUTS

SYSTEM

DC/DC

TPS5110

APL5331

1D25V_S0

2D5V_S3

36

YUHINA Serial

BLOCK DIAGR

A

M

A3

14

6

Tuesday, February 24, 2004

Ti

tl

e

S

iz

e

Document Number

Rev

Date:

Sheet

of

Acer Inc.

8F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

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