Cirrus Logic CobraNet - Manual (Page 130)

130
©
Copyright 2006 Cirrus Logic, Inc. DS651PM25
CobraNet Programmer’s Reference
Error Code Reference
Byte
Code
Flash
Code
Type Name Description
Expected
Conditions
Unexpected
Conditions
20 1,6,1 FATAL XILINX_ID
Xilinx does not
report expected
identification.
-
Problem with
Xilinx. Problem
with Xilinx
configuration file in
flash.
21 3,6,1 FATAL XILINX_VERSION
Reported Xilinx
version not
supported by boot
code.
-
Mismatched files
used during code
build.
22 5,6,1 FATAL POST_CLOCK_RANGE
Sample clock pull
range test failure.
The voltage
controlled sample
clock crystal
oscillator (VCXO)
pull range does not
meet minimum
requirements.
-
The VCXO device
does not meet
specification.
Problem with
VCXO control
voltage circuitry.
23 7,6,1 FATAL POST_CLOCK_STOPPED
Sample clock not
running. Timeout
waiting for
measurement
edge.
-
VCXO is not
oscillating.
Problem with FS1
circuitry or Xilinx.
24 1,7,1 FAULT XILINX_CHECKSUM
Checksum failure
reloading Xilinx
configuration
during runtime.
-
flash contents
corrupted
25 3,7,1 FATAL UNUSED - - -
27 7,7,1 FATAL UNUSED - - -
29 3,8,1 FATAL UNUSED - - -
31 7,8,1 FATAL UNUSED - - -
32 1,1,2 TXRX CYCLES
DSP processing
cycles exhausted.
Broadcast storm in
progress on
network.
Processor running
slow. Sample
clock running fast.
DMA controller
malfunctioning.
Unable to
acknowledge an
interrupt.
33 3,1,2 RX RX_STORM
Broadcast storm
detected.
Loop in network
producing
overwhelming
amount of
broadcast or
multicast network
traffic.
-