Register quick reference – Cirrus Logic CS42526 User Manual

Page 41

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DS585F2

41

CS42526

5. REGISTER QUICK REFERENCE

Addr Function

7

6

5

4

3

2

1

0

01h

ID

Chip_ID3

Chip_ID2

Chip_ID1

Chip_ID0

Rev_ID3

Rev_ID2

Rev_ID1

Rev_ID0

page 45

default

1

1

1

1

X

X

X

X

02h

Power Con-
trol

PDN_RCVR1 PDN_RCVR0

PDN_ADC

Reserved

PDN_DAC3 PDN_DAC2 PDN_DAC1

PDN

page 46

default

1

0

0

0

0

0

0

1

03h

Functional
Mode

CODEC_FM1 CODEC_FM0

SAI_FM1

SAI_FM0

ADC_SP

SEL1

ADC_SP

SEL0

DAC_DEM

RCVR_DEM

page 45

default

0

0

0

0

0

0

0

0

04h

Interface
Formats

DIF1

DIF0

ADC_OL1

ADC_OL0

DAC_OL1

DAC_OL0

SAI_RJ16

CODEC_RJ16

page 49

default

0

1

0

0

0

0

0

0

05h

Misc Control

Ext ADC

SCLK

HiZ_RMCK

Reserved

FREEZE

FILTSEL

HPF_

FREEZE

CODEC_SP

M/S

SAI_SP

M/S

page 50

default

0

0

0

0

0

0

0

0

06h

Clock Con-
trol

RMCK_DIV1

RMCK_DIV0

OMCK

Freq1

OMCK

Freq0

PLL_LRCK

SW_CTRL1 SW_CTRL0

FRC_PLL_LK

page 52

default

0

0

0

0

0

0

0

0

07h

OMCK/PLL_
CLK Ratio

RATIO7

RATIO6

RATIO5

RATIO4

RATIO3

RATIO2

RATIO1

RATIO0

page 53

default

X

X

X

X

X

X

X

X

08h

RVCR Sta-
tus

Digital Silence

AES

Format2

AES For-

mat1

AES For-

mat0

Active_CLK RVCR_CLK2 RVCR_CLK1

RVCR_CLK0

page 54

default

X

X

X

X

X

X

X

X

09h

Burst Pre-
amble PC
Byte 0

PC0-7

PC0-6

PC0-5

PC0-4

PC0-3

PC0-2

PC0-1

PC0-0

page 55

default

X

X

X

X

X

X

X

X

0Ah

Burst Pre-
amble PC
Byte 1

PC1-7

PC1-6

PC1-5

PC1-4

PC1-3

PC1-2

PC1-1

PC1-0

page 55

default

X

X

X

X

X

X

X

X

0Bh

Burst Pre-
amble PD
Byte 0

PD0-7

PD0-6

PD0-5

PD0-4

PD0-3

PD0-2

PD0-1

PD0-0

page 55

default

X

X

X

X

X

X

X

X

0Ch

Burst Pre-
amble PD
Byte 1

PD1-7

PD1-6

PD1-5

PD1-4

PD1-3

PD1-2

PD1-1

PD1-0

page 55

default

X

X

X

X

X

X

X

X

0Dh

Volume
Control

Reserved

SNGVOL

SZC1

SZC0

AMUTE

MUTE

SAI_SP

RAMP_UP

RAMP_DN

page 56

default

0

0

0

0

1

0

0

0

0Eh

Channel
Mute

Reserved

Reserved

B3_MUTE

A3_MUTE

B2_MUTE

A2_MUTE

B1_MUTE

A1_MUTE

page 58

default

0

0

0

0

0

0

0

0

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