Fpga register description, 1 code revision id - register 01h, 2 mclk source control - address 02h – Cirrus Logic CDB4265 User Manual
Page 12: Table 1. mclk source, Cdb4265
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CDB4265
12
DS657DB1
5. FPGA REGISTER DESCRIPTION
5.1
CODE REVISION ID - REGISTER 01H
Function:
Identifies the revision of the FPGA code. This register is Read-Only.
5.2
MCLK SOURCE CONTROL - ADDRESS 02H
5.2.1
MCLK SOURCE (BITS 5:4)
Default = 10
Function:
These bits select the source of the CS4265 MCLK signal. Table 1 shows the available settings.
7
6
5
4
3
2
1
0
Rev7
Rev6
Rev5
Rev4
Rev3
Rev2
Rev1
Rev0
7
6
5
4
3
2
1
0
Reserved
Reserved
MCLK1
MCLK0
Reserved
Reserved
Reserved
Reserved
Table 1. MCLK Source
MCLK1
MCLK0
MCLK Source
0
0
Oscillator
0
1
MCLK position on PCM Header (J15)
1
0
CS8416 RMCK
1
1
Reserved
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