Pin description, Cs4340a – Cirrus Logic CS4340A User Manual
Page 4
CS4340A
4
DS590F2
1. PIN DESCRIPTION
Pin Name
#
Pin Description
RST
1
Reset (Input) - Powers down device.
SDIN
2
Serial Audio Data (Input) - Input for two’s complement serial audio data.
SCLK
3
Serial Clock (Input) -Serial clock for the serial audio interface.
LRCK
4
Left Right Clock (Input) - Determines which channel, Left or Right, is currently active on the
serial audio data line.
MCLK
5
Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters.
DIF1
DIF0
6
7
Digital Interface Format (Input) - Defines the required relationship between the Left Right
Clock, Serial Clock and Serial Audio Data.
DEM
8
De-emphasis Control (Input) - Selects the standard 15
µs/50µs digital de-emphasis filter
response for the 44.1 kHz sample rate.
FILT+
9
Positive Voltage Reference (Output) - Positive voltage reference for the internal
sampling circuits.
VQ
10
Quiescent Voltage (Output) - Filter connection for internal quiescent reference voltage.
REF_GND
11
Reference Ground (Input) - Ground reference for the internal sampling circuits.
AOUTR
AOUTL
12
15
Analog Outputs (Output) - The full scale analog output level is specified in the
Analog Characteristics table.
AGND
13
Analog Ground (Input)
VA
14
Power (Input) - Positive power for the analog, digital and serial audio interface sections.
MUTEC
16
Mute Control (Output) - Control signal for an optional mute circuit.
15
2
14
3
13
4
16
1
11
6
10
7
9
8
12
5
RST
MUTEC
SDIN
AOUTL
SCLK
VA
LRCK
AGND
MCLK
AOUTR
DIF1
REF_GND
DIF0
VQ
DEM
FILT+