Figure 1. serial mode input timing, Cs4391a, Switching characteristics - pcm modes – Cirrus Logic CS4391A User Manual
Page 9
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CS4391A
DS600PP3
9
SWITCHING CHARACTERISTICS - PCM MODES
(Inputs: Logic 0 = 0 V, Logic 1 = VL)
Notes: 6. This serial clock is available only in Control Port Mode when the MCLK Divide bit is enabled.
Parameters
Symbol Min
Typ
Max
Units
Input Sample Rate
Fs
4
-
200
kHz
LRCK Duty Cycle
45
50
55
%
MCLK Duty Cycle
40
50
60
%
SCLK Frequency
-
-
MCLK/2
Hz
SCLK Frequency
(Note 6)
-
-
MCLK/4
Hz
SCLK rising to LRCK edge delay
t
slrd
20
-
-
ns
SCLK rising to LRCK edge setup time
t
slrs
20
-
-
ns
SDATA valid to SCLK rising setup time
t
sdlrs
20
-
-
ns
SCLK rising to SDATA hold time
t
sdh
20
-
-
ns
slrs
t
s lrd
t
s d lrs
t
s d h
t
S D AT A
S C LK
L R C K
Figure 1. Serial Mode Input Timing
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