2 power supply rejection reset (psr_reset), Table 17. power supply sync clock divider settings, 33 decimator shift/scale (addresses35h,36h,37h) – Cirrus Logic CS44800 User Manual

Page 74: 1 decimator shift (dec_shift[2:0]), 33 decimator shift/scale (addresses 35h, 36h, 37h)

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2 power supply rejection reset (psr_reset), Table 17. power supply sync clock divider settings, 33 decimator shift/scale (addresses35h,36h,37h) | 1 decimator shift (dec_shift[2:0]), 33 decimator shift/scale (addresses 35h, 36h, 37h) | Cirrus Logic CS44800 User Manual | Page 74 / 80 2 power supply rejection reset (psr_reset), Table 17. power supply sync clock divider settings, 33 decimator shift/scale (addresses35h,36h,37h) | 1 decimator shift (dec_shift[2:0]), 33 decimator shift/scale (addresses 35h, 36h, 37h) | Cirrus Logic CS44800 User Manual | Page 74 / 80
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