Cirrus Logic CS4970x4 - Manual (Page 12)

CS4970x4 Data Sheet
32-bit High Definition Audio Decoder DSP Family
DS752F1 12
5.8 Switching Characteristics — Internal Clock
Parameter Symbol Min Max Unit
Internal DCLK frequency
1
1. After initial power-on reset, F
dclk
= F
xtal
. After initial kick-start commands, the PLL is locked to max F
dclk
and remains locked until
the next power-on reset.
F
dclk —
– MHz
CS497004-CQZ
CS497004-CQZR
CS497024-CVZ
CS497024-CVZR
CS497014-CVZ
CS497014-CVZR
CS497024-CVZ
CS497024-CVZR
F
xtal
131
Internal DCLK period 1 DCLKP — – ns
CS497004-CQZ
CS497004-CQZR
CS497024-CVZ
CS497024-CVZR
CS497014-CVZ
CS497014-CVZR
CS497024-CVZ
CS497024-CVZR
7.63 1/F
xtal