Cirrus Logic AN118 - Manual (Page 21)

AN118
AN118REV2 21
temp1 = RXSER(); /* Which PC Cal. register is influenced? */
decode_sample_index();
if(mode == 1) P1 = 0xF4;
/* Clear CSb */
for (j=0; j<sample_size; j++) {
transfer_byte(temp); /* Perform Calibration */
do {/* Nothing*/} while (SDO !=0); /* Wait for cal. to Complete */
transfer_byte(temp1); /*Send Command*/
high_byte = receive_byte();/*Receive Bytes*/
mid_byte = receive_byte();
low_byte = receive_byte();
TXSER(low_byte);
/* Transfer Caled Register back */
TXSER(mid_byte);
TXSER(high_byte);
} /* END for loop */
if(mode == 1) P1 = 0xF5;
/* Set CSb */
COMM = 0x01; /* Turn off LED */
break;
/**********************/
/* Serial Port Initialization */
/**********************/
case 0x3F:
COMM = 0x00; /* Turn LED on */
if(mode == 1) P1 = 0xF4; /* Clear CSb */
SDI = 1; /* SET SDI PIN */
/* Write 255 bits of 1’s to SDI and then 1 zero */
for(j=0;j<254;j++) {
SCLK = 0x01; /* SET SCLK */
SCLK = 0x00; /* CLR SCLK */
}
SDI = 0;
/* RESET SDI PIN */
SCLK = 0x01; /* SET SCLK */
SCLK = 0x00; /* CLR SCLK */
if(mode == 1) P1 = 0xF5; /* Set CSb */
COMM = 0x01; /* Turn LED off */
break;
/******************************/
/* Reset Converter via RS & RV bits */
/******************************/
case 0x4F:
write_to_register(0x03,0x80,0x00,0x00); /* Set RS bit */
/* Test for Valid Reset */
do {
read_register(0x0B);
temp = low_byte&0x40;
/* Mask RV bit to 1 */
if(temp == 0x40)