Cirrus Logic AN265 - Manual (Page 2)

AN265
2 AN265REV2
The NC7SPU04 is an unbuffered inverter that is powered from the 1.8 VDC rail. The output of the
NC7SPU04 connects to the RTCXTALI input on the EP93xx device. The RTCXTALO pin is left open. The
exact value of the capacitors may need to be adjusted based on the actual crystal used and the layout
and routing of the circuit. Care should be taken to minimize the trace lengths and to avoid high-speed sig-
nals near the oscillator input. The 475 k
Ω resistor (R2) ensures that the crystal is not overdriven. Over-
driving the crystal can lead to premature aging and failure of the crystal. The RTC clock is vital to booting
up the EP93xx devices. Without an RTC clock, the EP93xx processor will not boot.
A Schmitt-trigger inverter has been added to the output of the oscillator circuit. The new inverter is also
powered off the 1.8 VCD rail, referred to as PWR_CORE in Figure 1. The Schmitt-trigger inverter has
been added so that the EP93xx device will only receive a full-scale RTC clock. The Schmitt-trigger inverter
will not produce a clock output until the RTC oscillator has produced levels that meet the minimum input
threshold level of the Schmitt-trigger inverter. Figure 2 shows the output from the new circuit, RTC_CLK
is on channel 1 and RTC_CLK_UB is on channel 2 in Figure 2.
Figure 2. Buffered and Unbuffered RTC Oscillator Output.