MSI RS482M4-FD/ILD/IL/L - Manual (Page 60)

3-19
BIOS Setup
PCI Latency Timer
This item controls how long each PCI device can hold the bus before another takes
over. W hen set to higher values, every PCI device can conduct transactions for a
longer time and thus improve the effective PCI bandwidth. For better PCI performance,
you should set the item to higher values. Setting options: [32], [64], [96], [128].
IRQ Resource Setup
Press <Enter> to enter the sub-menu and the following screen appears.
IRQ 3/4/5/7/9/10/11/14/15
These items specify the bus where the specified IRQ line is used.
The settings determine if AMIBIOS should remove an IRQ from the pool of avail-
able IRQs passed to devices that are configurable by the system BIOS. The
available IRQ pool is determined by reading the ESCD NVRAM. If more IRQs must
be removed from the IRQ pool, the end user can use these settings to reserve
the IRQ by assigning an [Reserved] setting to it. Onboard I/O is configured by
AMIBIOS. All IRQs used by onboard I/O are configured as [Available]. If all IRQs
are set to [Reserved], and IRQ 14/15 are allocated to the onboard PCI IDE, IRQ 9
will still be available for PCI and PnP devices. Available settings: [Reserved] and
[Available].
MSI Reminds You...
IRQ (Interrupt Request) lines are system resources allocated to I/O
devices. When an I/O device needs to gain attention of the operating
system, it signals this by causing an IRQ to occur. After receiving the
signal, when the operating system is ready, the system will interrupt
itself and perform the service required by the I/O device.