Achronix Speedster22i PCIe - Manual (Page 77)

UG030, April 26, 2013 77
output
clk_out ;
//// SERDES SIDE INTERFACE ////
output [7:0]
tx_p ; //// FOR (P-SIDE)
output [7:0] tx_n ; //// FOR (N-SIDE)
output [15:0]
o_serdes_sbus_data ;
output [7:0] o_serdes_sbus_ack ;
///// REGULAR PARALLEL INTERFACE WITH FABRIC-CORE /////
output [1:0]
o_sbus_data ;
output o_sbus_ack ;
output
bypass_tx_ready ;
output bypass_tx_almost_full ;
output bypass_tx_np_ok ;
output bypass_rx_valid ;
output bypass_rx_sop ;
output bypass_rx_eop ;
output [127:0] bypass_rx_data ;
output [15:0] bypass_rx_data_valid ;
output bypass_rx_ecrc_error ;
output [12:0] bypass_rx_decode_info ;
output bypass_msi_en ;
output bypass_msix_en ;
output bypass_interrupt_msix_ack ;
////// DMA INTERFACE ///
///// SYSTEM2CARD ////
output [1:0]
s2c_areset_n ;
output [1:0] s2c_aclk_out ;
output [1:0] s2c_awvalid ;
output [71:0] s2c_awaddr ;
output [7:0] s2c_awlen ;
output [1:0] s2c_awusereop ;
output [5:0] s2c_awsize ;
output [1:0] s2c_wvalid ;
output [255:0] s2c_wdata ;
output [31:0] s2c_wstrb ;
output [1:0] s2c_wlast ;
output [1:0] s2c_wusereop ;
output [1:0] s2c_bready ;
///// CARD2SYSTEM INTERFACE ////