Vmp2 functional description – Kontron VMP2 User Manual

Page 35

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VMP2

Functional Description

ID 24855, Rev. 02

Page 2 - 7

© 2002 PEP Modular Computers GmbH

PCI agent mode capability

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Address translation unit

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Internal configuration registers accessible from PCI

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Two-channel integrated DMA controller

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Supports direct mode or chaining mode (automatic linking of DMA transfers)

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Supports scatter gathering - read or write discontinuous memory

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Interrupt on completed segment, chain, and error

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Local-to-local memory

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PCI-to-PCI memory

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PCI-to-local memory

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Local-to-PCI memory

Message unit

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I2O message controller

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Two door-bell registers

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In-bound and out-bound messaging registers

I2C controller with full master/slave support

Embedded programmable interrupt controller (EPIC)

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Five hardware interrupts (IRQs) or 16 serial interrupts

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Four programmable timers

Integrated PCI bus and SDRAM clock generation

Programmable memory and PCI bus output drivers

Debug features

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Watchpoint monitor

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Address attribute and PCI attribute signals

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JTAG/COP - common onboard processor for in-circuit hardware debugging

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Performance monitor

603e core

High performance, superscalar 603e core

627 Dhrystone (2.1) MIPS

Integer unit (IU), floating point unit (FPU) (user enabled or disabled), load/store unit
(LSU), system register unit (SRU), and a branch processing unit (BPU)

16 kB instruction cache

16 kB data cache

Lockable L1 cache - entire cache or on a per-way basis

Dynamic power management

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