Kontron SMARC-sA3874i - Manual (Page 40)

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User’s Guide
3.2.22 CAN Interface
There are two CAN buses defined in the ULP-COM specification: CAN0 & CAN1. The sA3874i supports both
CAN buses. The CAN bus interface signals on the ULP-COM sA3874i edge connector are shown below:
ULP-COM sA3874i Edge finger TI Cortex A8 CPU Net Name Notes
Pin # Pin Name Pin # Pin Name
P143 CAN0_TX AH6 DCAN0_TX I2C_PM_CK/I2C0_CK
Power management
I2C bus clock
P144 CAN0_RX AG6 DCAN0_RX I2C_PM_DAT/I2C0_DAT
Power management
I2C bus data
P145 CAN1_TX AE6 DCAN1_TX I2C _GP_CK/I2C2_CK
General purpose I2C
bus clock
P146 CAN1_RX AF5
DCAN1_RX
I2C _GP_DAT/I2C2_DAT
General purpose I2C
bus data