Cypress CY7C1338G - Manual (Page 8)

CY7C1338G
Document #: 38-05521 Rev. *D Page 8 of 17
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage on V
DD
Relative to GND........ –0.5V to +4.6V
Supply Voltage on V
DDQ
Relative to GND ...... –0.5V to +V
DD
DC Voltage Applied to Outputs
in tri-state ............................................ –0.5V to V
DDQ
+ 0.5V
DC Input Voltage ................................... –0.5V to V
DD
+ 0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage........................................... >2001V
(per MIL-STD-883, Method 3015)
Latch-up Current..................................................... >200 mA
Operating Range
Range
Ambient
Temperature
]
V
DD
V
DDQ
Commercial 0°C to +70°C 3.3V
−5%/+10% 2.5V –5%
to V
DD Industrial –40°C to +85°C
Electrical Characteristics Over the Operating Range [8, 9]
Parameter Description Test Conditions Min. Max. Unit
V
DD
Power Supply Voltage 3.135 3.6 V
V
DDQ
I/O Supply Voltage 2.375 V
DD
V
V
OH
Output HIGH Voltage for 3.3V I/O, I
OH
= –4.0 mA 2.4 V
for 2.5V I/O, I
OH
= –1.0 mA 2.0 V
V
OL
Output LOW Voltage for 3.3V I/O,I
OL
= 8.0 mA 0.4 V
for 2.5V I/O, I
OL
= 1.0 mA 0.4 V
V
IH
Input HIGH Voltage for 3.3V I/O 2.0 V
DD
+ 0.3V V
for 2.5V I/O 1.7 V
DD
+ 0.3V V
V
IL
Input LOW Voltage
[8]
for 3.3V I/O –0.3 0.8 V
for 2.5V I/O –0.3 0.7 V
I
X
Input Leakage Current
except ZZ and MODE GND
≤ V
I
≤ V
DDQ
−5
5
µA
Input Current of MODE Input = V
SS
–30
µA
Input = V
DD
5
µA
Input Current of ZZ Input = V
SS
–5
µA
Input = V
DD
30
µA
I
OZ
Output Leakage Current GND
≤ V
I
≤ V
DDQ
, Output Disabled –5 5
µA
I
DD
V
DD
Operating Supply
Current
V
DD
= Max., I
OUT
= 0 mA,
f = f
MAX
= 1/t
CYC
7.5-ns cycle, 133 MHz 225 mA
10-ns cycle, 100 MHz 205 mA
I
SB1
Automatic CE
Power-Down
Current—TTL Inputs Max. V
DD
, Device Deselected,
V
IN
≥ V
IH
or V
IN
≤ V
IL
, f = f
MAX
,
inputs switching
7.5-ns cycle, 133 MHz 90 mA
10-ns cycle, 100 MHz 80 mA
I
SB2
Automatic CE
Power-Down
Current—CMOS Inputs Max. V
DD
, Device Deselected,
V
IN
≥ V
DD
– 0.3V or V
IN
≤ 0.3V,
f = 0, inputs static
All speeds 40 mA
I
SB3
Automatic CE
Power-Down
Current—CMOS Inputs Max. V
DD
, Device Deselected,
V
IN
≥ V
DDQ
– 0.3V or V
IN
≤
0.3V,
f = f
MAX
, inputs switching
7.5-ns cycle, 133 MHz 75 mA
10-ns cycle, 100 MHz 65 mA
I
SB4
Automatic CE
Power-Down
Current—TTL Inputs Max. V
DD
, Device Deselected,
V
IN
≥ V
DD
– 0.3V or V
IN
≤ 0.3V,
f = 0, inputs static
All speeds 45 mA
Notes:
8. Overshoot: V
IH
(AC) < V
DD
+1.5V (Pulse width less than t
CYC
/2), undershoot: V
IL
(AC) > –2V (Pulse width less than t
CYC
/2).
9. T
Power-up
: Assumes a linear ramp from 0V to V
DD
(min.) within 200 ms. During this time V
IH
< V
DD
and V
DDQ
< V
DD
.