Digilent 410-138P-KIT - Manual (Page 14)

Genesys Reference Manual
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Video Output
Video output is accomplished using a Chrontel CH7301C DVI transmitter device connected to a
standard Type A HDMI connector (J3). DVI and HDMI share a common TMDS signaling standard, so
a simple adaptor can be used to convert the HDMI connector to a DVI connector (VGA signals are not
available on the HDMI connector).
The Chrontel CH7301C (IC3) supports up to 1600 X 1200 resolutions with 24-bit color. Status and
control information can be moved between the FPGA and the CH7301C using an I2C bus (SCL to
FPGA pin U8, and SDA to FPGA pin V8, both using the LVCMOS33 I/O standard). The I2C bus is
also routed to the HDMI connector to allow direct communications with external monitors.
EDK designs can use the xps_tft IP core (and its associated driver) to access the Chrontel device.
The xps_tft core reads video data from the DDR2 memory, and sends it to the Chrontel device for
display on an external monitor. The IP core is capable of resolutions of 640X480 at 18 bits per pixel.
An EDK reference design available on the Digilent website (and included as a part of the User Demo)
reads a bitmap file from the StartaFlash memory and displays it on the monitor. Another second EDK
reference design (included in the User test available though Adept) displays a gradient color bar and a
text in the center of the screen.
An ISE reference design is available that displays a color bar. This reference design provides and
example of using the DVI circuit with an ISE project.
Audio (AC-97)
The Genesys board includes a
National Semiconductor LM4550 AC
‘97 audio codec (IC19) with four 1/8”
audio jacks for line-out (J16),
headphone-out (J18), line-in (J15)
and microphone-in (J17). Audio data
Data Signals
D0: G10
D1: G8
D2: B12
D3: D12
D4: C12
D5: D11
D6: F10
D7: D10
D8: E9
D9: F9
D10: E8
D11: F8