Digilent 410-182P-KIT - Manual (Page 5)

Nexys3 Reference Manual
Doc: 502-182 page 5 of 22
The configuration tool supports programming
from any valid ROM file produced by the Xilinx
tools. After programming, board power can
either be cycled or the Reset button can be
pressed to program the FPGA from the PCM
device selected by the J8 mode jumper. If
programming with a .bit file, the startup clock
must be set to CCLK.
All three memory devices (the PCM's and the
cellular RAM) can be fully tested by clicking the
Full Test button. They can also be completely
erased by clicking the Erase button.
The Read/Write tools allow data to be
exchanged between files on the host PC and
specified address ranges in the memory
devices.
Test Interface
The test interface provides an easy way to
verify many of the board's hardware circuits and
interfaces. These are divided into two major
categories: on-board memory (RAM and Flash)
and peripherals. In both cases, the FPGA is
configured with test and PC-communication
circuits, overwriting any FPGA configuration
that may have been present.
Clicking the Run RAM/Flash Test button will
identify the CellularRam, SPI Flash, and BPI
Flash memory by reading out and verifying the
IDCODE on each memory. The memory
contents will not be modified. To run a full test
on a particular memory device, refer to the Full
Test in the Memory Tab.
Clicking the Start Peripherals Test button will
initialize GPIO and user I/O testing. Once the
indicator near the Start Peripherals Test button
turns green, all peripheral tests can be run.
The Test Shorts feature checks all discrete
I/O’s for shorts to Vdd, GND, and neighboring
I/O pins. The switches and buttons graphics
show the current states of those devices on the
Nexys3 board. Connect a VGA monitor and
USB mouse to visually test the J2 VGA port and
J4 USB port respectively.