Digilent Digilab 2 - Manual (Page 6)

Digilent Digilab 2 Reference Manual Digilent, Inc.
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low noise supplies using inexpensive power supplies, regardless of load (up to 1.5A). The regulator
bodies are soldered to the board for improved thermal dissipation. DC supplies in the range of 5VDC
to 10VDC may be used.
The Digilab 2 board uses a four layer PCB, with the inner layers dedicated to VCC and GND planes.
Most of the VCC plane is at 3.3V, with an island under the FPGA at 2.5V. The FPGA and the other
ICs on the board all have 0.1uF bypass capacitors placed as close as possible to the VCC pins.
Total board current is dependent on FPGA configuration, clock frequency, and external connections. In
test circuits with roughly 50K gates routed, a 50MHz clock source and a single expansion board
attached (the DIO2 board), approximately 200mA +/- 30% of supply current is drawn from the 2.5V
supply and approximately 150mA +/- 50% is drawn from the 3.3V supply. These currents are strongly
dependent on FPGA and peripheral board configurations.
All FPGA VCCO pins are connected to the 3.3V supply. If other VCCO voltages are required, please
contact Digilent for information regarding various options (www.digilentinc.com).
Expansion connectors
The six expansion connectors, shown in Figure 4,
are labeled A-F and use 100 mil spaced DIP headers.
All six connectors have GND routed to pin 1, VU
routed to pin 2, and 3.3V routed to pin 3. Pins 4-40
all route directly to the FPGA. The connectors are
organized in pairs, with the A & B, C& D, and E &
F pairs placed on the same board edge. Connectors
A & B and E & F are routed in parallel, with pairs A
& E and B & F sharing identical pin connections to
the FPGA. Connectors C & D have all pins routed to
separate FPGA pins. All connector pairs are
separated by 400 mils, so any peripheral board can
be placed in any connector (or pair of connectors).
The PQ208 package used on the D2 board allows
122 signals to be routed to the expansion connectors
(the remaining 21 available signals are routed to the
parallel and serial connectors). Connectors C & D
are closest to the FPGA, and all C & D pins are
connected to the closest available FPGA pins with
the shortest possible route. Thus, the 74 FPGA signals routed to the C & D connectors will exhibit the
A B
C
D
F E
37
37
37
9
Spartan 2
PQ208
DB-25
DB-9
Figure 4. Expansion connector detail
Pin 1: GND
Pin 2: VU
Pin 3: 3.3V Pin 39
Pin 40
Pin 4
Pin 39
Pin 40