Digilent D2XL User Manual

Page 7

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Digilent D2XL Reference Manual

Digilent, Inc.

www.digilentinc.com

page 7 of 7

Copyright Digilent, Inc. All rights reserved. Other product and company names mentioned may be trademarks of their respective owners.

Spartan 2 FPGA

The block diagram of the D2XL board shows all
connections between the FPGA and the devices on
the board. All FPGA pin connections are shown in the
following table.

The Spartan device can be configured using the
Xilinx JTAG tools and a parallel cable connecting the
D2XL board and the host computer. Note that a
separate JTAG header that connects directly to the
JTAG pins is also provided.

For further information on the Spartan FPGA, please
see the Xilinx data sheets available at the Xilinx
website (www.xilinx.com).





D2XL FPGA Pinout

Pin

Function

Pin

Function Pin

Function

1

VCCO

49

B8 97

VCCIN

2

TCK

50

B7 98

GND

3

B35

51

B6 99

A16

4

B34

52

GND

100

A15

5

B33

53

VCCO

101

NC

6

B32

54

B5 102

A14

7

B31

55

VCCINT

103

A13

8

GND

56

B4 104

NC

9

VCCINT

57

A40 105

NC

10

B30

58

A39 106

M2

11

B29

59

A38 107

VCCO

12

B28

60

A37 108

VCCO

13

B27

61

GND

109

M0

14

VCCINT

62

A36 110

GND

15

BTN1*

63

A35 111

M1

16

VCCO

64

A37 112

A12

17

GND

65

A34 113

A11

18

B40

*

66

A33 114

A10

19

B26

67

A32 115

A9

20

B25

68

INIT

116

NC

21

B24

69

PROG

117

A8

22

B23

70

VCCO

118

A7

23

B22

71

VCCO

119

GND

24

VCCINT

72

DONE

120

A6

25

GND

73

GND

121

A5

26

B21

74

A31 122

A4

27

B20

75

A30 123

PDS

28

B19

76

A36 124

PWT

29

B18

77

A29 125

VCCINT

30

B17

78

A28 126

PRS

31

B16

79

A27 127

VCCO

32

TDI

80

A26 128

GND

33

GND

81

GND

129

PINT

34

TDO

82

VCCINT

130

PAS

35

VCCO

83

A25 131

PD7

36

VCCO

84

A24 132

PD6

37

CCLK

85

A23 133

PD5

38

LED1

86

A22 134

PD4

39

DIN

87

A21 135

GND

40

B15

88

B39*

136

PD3

41

B14

89

GND

137

PD2

42

B38

90

VCCO

138

NC

43

B13

91

MCLK* 139

PD1

44

B12

92

VCCINT

140

PD0

45

GND

93

A20 141

PWE

46

B11

94

A19 142

TMS

47

B10

95

A18 143

GND

48

B9

96

A17 144

VCCO

* uses GCLK input

Expansion F

DB-25 parallel port

LED

Push

button

Clock

SPROM

JTAG

37

4

13

4

Spartan 2 TQ144

37

Expansion E

D2XL FPGA circuit block diagram

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