Cypress CY62167EV30 - Manual (Page 3)

CY62167EV30 MoBL
®
Document #: 38-05446 Rev. *E Page 3 of 14
Maximum Ratings
Exceeding the maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ................................ –65°C to + 150°C
Ambient Temperature with
Power Applied ........................................... –55°C to + 125°C
Supply Voltage to Ground
Potential .................................–0.3V to 3.9V V
CC(max)
+ 0.3V
DC Voltage Applied to Outputs
in High Z State [6, 7] ..................–0.3V to 3.9V V
CC(max)
+ 0.3V
DC Input Voltage [6, 7] ...........–0.3V to 3.9V (V
CC
(max) + 0.3V
Output Current into Outputs (LOW) ............................ 20 mA
Static Discharge Voltage........................................... >2001V
(MIL-STD-883, Method 3015)
Latch up Current...................................................... >200 mA
Operating Range
Device Range
Ambient
Temperature
V
CC
[8]
CY62167EV30LL Industrial/
Auto-A
–40°C to +85°C 2.2V to 3.6V
Electrical Characteristics
Over the Operating Range
Parameter Description Test Conditions
45 ns (Industrial/Auto-A)
Unit
Min Typ [5] Max
V
OH
Output HIGH Voltage 2.2 < V
CC
< 2.7 I
OH
= –0.1 mA 2.0 V
2.7 < V
CC
< 3.6 I
OH
= –1.0 mA 2.4 V
V
OL
Output LOW Voltage 2.2 < V
CC
< 2.7 I
OL
= 0.1 mA 0.4 V
2.7 < V
CC
< 3.6 I
OL
= 2.1mA 0.4 V
V
IH
Input HIGH Voltage 2.2 < V
CC
< 2.7 1.8 V
CC
+ 0.3V V
2.7 < V
CC
< 3.6 2.2 V
CC
+ 0.3V V
V
IL
Input LOW Voltage 2.2 < V
CC
< 2.7 –0.3 0.6 V
2.7 < V
CC
< 3.6 For VFBGA package –0.3 0.8 V
For TSOP I package –0.3 0.7 [9] V
I
IX
Input Leakage Current GND < V
I
< V
CC
–1 +1 μA
I
OZ
Output Leakage Current GND < V
O
< V
CC
, Output Disabled –1 +1 μA
I
CC
V
CC
Operating Supply
Current
f = f
MAX
= 1/t
RC
V
CC
= V
CC
(max)
I
OUT
= 0 mA
CMOS levels
25 30 mA
f = 1 MHz 2.2 4.0 mA
I
SB1
Automatic CE Power Down
Current—CMOS Inputs
CE
1
> V
CC
− 0.2V or CE
2
< 0.2V
V
IN
> V
CC
− 0.2V, V
IN
< 0.2V,
f = f
MAX
(Address and Data Only),
f = 0 (OE, WE, BHE and BLE), V
CC
= 3.60V
1.5 12 μA
I
SB2
[10] Automatic CE Power Down
Current—CMOS Inputs
CE
1
> V
CC
− 0.2V or CE
2
< 0.2V,
V
IN
> V
CC
− 0.2V or V
IN
< 0.2V,
f = 0, V
CC
= 3.60V
1.5 12 μA
Capacitance
Tested initially and after any design or process changes that may affect these parameters.
Parameter Description Test Conditions Max Unit
C
IN
Input Capacitance T
A
= 25°C, f = 1 MHz,
V
CC
= V
CC(typ)
10 pF
C
OUT
Output Capacitance 10 pF
Notes
6. V
IL
(min) = –2.0V for pulse durations less than 20 ns.
7. V
IH
(max) = V
CC
+ 0.75V for pulse durations less than 20 ns.
8. Full Device AC operation assumes a 100 μs ramp time from 0 to V
CC
(min) and 200 μs wait time after V
CC
stabilization.
9. Under DC conditions the device meets a V
IL
of 0.8V. However, in dynamic conditions Input LOW Voltage applied to the device must not be higher than 0.7V. This is
applicable to TSOP I package only.
10. Only chip enables (CE
1
and CE
2
), byte enables (BHE and BLE) and BYTE must be tied to CMOS levels to meet the I
SB2
/ I
CCDR
spec. Other inputs can be left floating
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