Designing systems for esd immunity – Echelon LonWorks Twisted Pair Control Module User Manual

Page 41

Advertising
background image

LonWorks Twisted Pair Control Module User's Guide

33

Designing Systems for ESD Immunity

ESD hardening includes the following techniques:

Provide adequate creepage and clearance distances to prevent ESD hits

from reaching sensitive circuitry

Provide low impedance paths for ESD hits to ground

Use diode clamps or transient voltage suppression devices for accessible,

sensitive circuits

The best protection from ESD damage is circuit inaccessibility. If all circuit

components are positioned away from package seams, the static discharges can

be prevented from reaching ESD sensitive components. There are two measures

of “distance” to consider for inaccessibility: creepage and clearance. Creepage is

the shortest distance between two points along the contours of a surface.

Clearance is the shortest distance between two points through the air. An ESD

hit generally arcs farther along a surface than it does when passing straight

through the air. For example, a 20 kV discharge can arc about 10 mm (0.4

inches) through dry air, but the same discharge can travel over 20 mm (0.8

inches) along a clean surface. Dirty surfaces can allow arcing over even longer

creepage distances.
When ESD hits to circuitry cannot be avoided through creepage, clearance and

ground guarding techniques (for example, at external connector pins), explicit

clamping of the exposed lines is required to shunt the ESD current. Consult a

good text on EMC for advice about ESD and transient protection for exposed

circuit lines. In general, exposed lines require diode clamps to the power supply

rails or Zener clamps to chassis ground to shunt the ESD current to ground while

clamping the voltage low enough to prevent circuit damage. The control module’s

I/O and control lines are connected directly to the external connector (JP1 for the

FT 5000 Control Module; P1 for the Neuron 3150 Control Modules) without any

ESD protection beyond that provided by the Smart Transceiver or Neuron Chip

itself. If these lines are likely to be exposed to ESD in an application, protection

must be added on the application electronics board. Figure 17 on page 34 shows

an example of the use of diode clamps to protect the control module I/O lines in a

keypad scanning application.
The control modules use diode clamping and transformer isolation to shunt ESD

from the network connector (JP1 for the FT 5000 Control Module; P2 for the

Neuron 3150 Control Modules) to ground. It is therefore important to provide a

low impedance ground path from the JP1 connector or the mounting hole near

P2 to the main system ground. The Neuron 3150 TP/FT-10 also includes spark

gaps (designed to arc at approximately 1000 to 2000 V) between each of the

network lines to ground and a diode-capacitor protection circuit to absorb ESD

energy. The Neuron 3150 TP/FT-10F uses similar, but not identical, protection

circuitry.

Advertising