Altera Cyclone III FPGA Starter Kit - Manual (Page 25)

Altera Corporation 4–3
July 2010 Cyclone III FPGA Starter Kit User Guide
Measuring Power on the Cyclone III Starter Board
1 To obtain the power (P) in milliwatts, measure <Measured
Voltage> (the voltage across the sense resistors at JP6 or JP3) in
mV and calculate the nominal power using the equation:
P = 100 x <Measured Voltage> x <Supply Voltage>
where <Supply Voltage> is 1.2 V for JP6 and 2.5 V for JP3.
You can use the four input buttons to advance through the various power
state as outlined in
Table 4–2 . Notice how current increases as frequency
and resource usage increase.
You can also measure the I/O power consumed by measuring the voltage
across sense-resistor JP3 when Button 4 is pressed and held. Because this
2.5-V power rail is shared with other devices, there is a nominal 100 mW
that must be subtracted from the calculated I/O power to obtain the
FPGA I/O power.
The number of I/O pins used is controlled by the resource state (shown
in
Tables 4–2 and 4–3 ). For each increment in resources, 16 additional I/O
pins are added (refer to Table 4–4 ).
Similarly, the toggle-frequency of these I/O pins is set by the overall
design frequency (refer to
Table 4–1 ).
Changing the Example Design
The source code for the Cyclone III power example design is also
provided so you can use it as a starting point for your own measurements.
You can adjust the number of outputs by changing parameter
NUM_OUTPUTS_PER_STAMP
. The default is 16, which for four resource
percentage steps equates to 16 x 4 = 64.
The appropriate pins to be used as outputs are pre-assigned to the HSMC
connector (J1). If you would like to look at more than the 76 I/Os available
on J1, you need to make the appropriate pin assignments.
Table 4–4. I/O Pin & Resource State
LED4/LED3 Number of I/O Pins
00 16
01 32
10 48
11 64