Altera Low Latency Ethernet 10G MAC - Manual (Page 90)

Signal Direction Width Description
avalon_st_tx_pfc_gen_
data[]
In n
(4–16)
n = 2 x Number of PFC queues parameter.
Each pair of bits is associated with a priority queue. Bits
0 and 1 are for priority queue 0, bits 2 and 3 are for
priority queue 1, and so forth. Set the respective pair of
bits to the following values to trigger the specified
actions for the corresponding priority queue.
• 0x0: Stops pause frame generation for the
corresponding queue.
• 0x1: Generates an XON pause frame for the
corresponding queue.
• 0x2: Generates an XOFF pause frame for the
corresponding queue. The MAC IP core sets the
pause quanta field in the pause frame to the value in
the
tx_pauseframe_quanta
register.
• 0x3: Reserved.
avalon_st_rx_pfc_
pause_data[]
Out n
(2–8)
n = Number of PFC queues parameter.
When the MAC RX receives a pause frame, it asserts bit
n of this signal when the pause quanta for the n th queue
is valid (Pause Quanta Enable [n] = 1) and greater than
0. For each quanta unit, the MAC RX asserts bit n for
eight clock cycle.
The MAC RX deasserts bit n of this signal when the
pause quanta for the n th queue is valid (Pause Quanta
Enable [n] = 1) and equal to 0. The MAC RX also
deasserts bit n when the timer expires.
avalon_st_rx_pause_
length_valid
Out 1 This signal is present in the MAC RX only variation.
The MAC IP core asserts this signal to request its link
partner to suspend data transmission. When asserted, a
valid pause quanta is available on the
avalon_st_rx_
pause_length_data
bus.
avalon_st_rx_pause_
length_data[]
Out 16 This signal is present only in the MAC RX only
variation.
Specifies the pause quanta in unit of quanta, where 1
unit = 512 bits time.
Avalon-ST Status Interface
Avalon-ST TX Status Signals
5-8 Avalon-ST Status Interface
UG-01144
2014.12.15
Altera Corporation Interface Signals for LL Ethernet 10G MAC
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