Altera Arria II GX FPGA - Manual (Page 36)

6–16 Chapter 6: Board Test System
The Power Monitor
Arria II GX FPGA Development Kit, 6G Edition User Guide July 2010 Altera Corporation
■ Tx(MBps) and Rx(MBps)—Show the number of bytes of data analyzed per
second. The transceiver bus is 4 bits (serial channels) wide and the data rate is
6.375 Gbps, totaling 6375 MBps full-duplex. The LVDS SERDES bus is 17 bits wide
and the frequency is 1.25 GHz double data rate, equating to a theoretical
maximum bandwidth of 5312.5 MBps full-duplex.
The Power Monitor
The Power Monitor measures and reports current power information for the board. To
start the application, click Power Monitor in the Board Test System application.
1 You can also run the Power Monitor as a stand-alone application. PowerMonitor.exe
resides in the <install
dir>\kits\arriaIIGX_2agx260_fpga\examples\board_test_system directory. On
Windows, click Start > All Programs > Altera > Arria II GX FPGA Development Kit,
6G Edition
<version> > Power Monitor to start the application.