Altera CIC MegaCore Function User Manual
Page 6

Device
Filter Type
ALM
Memory
Registers
f
MAX
(MHz)
M10K
M20K
Primary
Secondary
Arria V Interpolator 5
Channels 3
Interfaces
886
27
--
1,776
17
232.61
Arria V Interpolator
Convergent
Rounding
352
1
--
785
12
304
Arria V Interpolator
Variable Rate
Change
889
27
--
1,772
23
235
Cyclone
V
Decimator
492
2
--
1,137
17
182
Cyclone
V
Decimator 5
Channels
1,162
2
--
3,748
8
190.15
Cyclone
V
Decimator 5
Channels 3
Interfaces
906
37
--
1,719
9
204
Cyclone
V
Decimator
Hogenauer Pruning
352
1
--
784
14
246
Cyclone
V
Decimator
Truncation
463
2
--
1,054
4
177
Cyclone
V
Decimator Variable
Rate Change
917
37
--
1,730
5
193.27
Cyclone
V
Interpolator
324
1
--
709
37
264
Cyclone
V
Interpolator 5
Channels
760
1
--
2,383
11
235
Cyclone
V
Interpolator 5
Channels 3
Interfaces
890
27
--
1,747
48
168
Cyclone
V
Interpolator
Convergent
Rounding
352
1
--
784
14
246.06
Cyclone
V
Interpolator
Variable Rate
Change
894
27
--
1,725
70
165
Stratix
V
Decimator
515
--
1
1,152
6
377
Stratix
V
Decimator 5
Channels
1,176
--
1
3,750
8
413
1-4
CIC IP Core Performance and Resource Utilization
UG-CIC
2014.12.15
Altera Corporation
About The CIC IP Core