Altera I/O Buffer (ALTIOBUF) IP Core - Manual (Page 29)

VHDL LIBRARY-USE Declaration
The VHDL LIBRARY-USE declaration is not required if you use the VHDL Component Declaration.
LIBRARY altera_mf;
USE altera_mf.altera_mf_components.all;
Document Revision History
This table lists the revision history for this user guide.
Table 16: Document Revision History
Date Version Changes
December 2014 2014.12.15 Template update.
2014.06.30 4.0
• Replaced MegaWizard Plug-In Manager information
with IP Catalog.
• Added standard information about upgrading IP cores.
• Added standard installation and licensing information.
• Removed outdated device support level information. IP
core device support is now available in IP Catalog and
parameter editor.
• Removed all references to obsolete SOPC Builder tool.
June 2013 3.2
• Added “Differential Mode Pin Naming Convention”
• Updated the “Assignments Necessary For Dynamic
Delay Chain Usage” to include a link to the ALTDQ_
DQS2 Megafunction User Guide.
June 2013 3.1 Updated Table 2–1 on page 2–1 and Table 2–2 on page 2–2
to update the device family support.
February 2012 3.0
• Updated device support
• Added references to device handbook for delay chain
values
November 2010 2.1
• Updated to new template
• Updated ports and parameters
• Added prototypes and component declarations
December 2008 2.0
• Added sentence to I/O Buffer and Dynamic Delay
Integration
• Added two last paragraph to Common Applications
• Added extra note to Table 3–5
• Remove figures
UG-01024
2014.12.15
VHDL LIBRARY-USE Declaration 29
I/O Buffer (ALTIOBUF) IP Core User Guide Altera Corporation
Send Feedback