Altera Stratix V Avalon-ST - Manual (Page 95)

Bits Register Description Default Value Access
[31:2] Reserved 0
Default Value
RO
Table 5-30: SR-IOV Control and Status Registers - 0x188
Bits Register Description Default Value Access
[0] VF Enable 0 RW
[1] VF Migration Enable. Not implemented. 0
RO
[2]
VF Migration Interrupt Enable. Not implemented.
0 RO
[3] VF Memory Space Enable 0 RW
[4] ARI Capable Hierarchy 0 RW
[15:5] Reserved 0 RO
[31:16] SR-IOV Status Register. Not implemented 0 RO
InitialVFs and TotalVFs Registers
Table 5-31: InitialVFs and TotalVFs Registers - 0x18C
Bits Description Default Value Access
[15:0] InitialVFs. Specifies the initial number of VFs configured for this
PF.
Same value as
TotalVFs
RO
[31:16] TotalVFs. Specifies the total number of VFs attached to this PF. Set in Qsys
RO
Table 5-32: Function Dependency Link and NumVFs Registers - 0x190
Bit Location Description Default Value Access
[15:0] NumVFs. Specifies the number of VFs enabled for this PF. 0 RW
[31:16] Function Dependency Link 0 RO
UG-01097_sriov
2014.12.15
InitialVFs and TotalVFs Registers 5-21
Registers Altera Corporation
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