IBASE IB882 - Manual (Page 32)

DRIVER INSTALLATION
28 IB882 User’s Manual
Advanced Chipset Features
This Setup menu controls the configuration of the chipset.
Phoenix - AwardBIOS CMOS Setup Utility
Advanced Chipset Features
DRAM Timing Selectable By SPD ITEM HELP
SLP_S4# Assertion Width 4 to 5 Sec Menu Level >
System BIOS Cacheable Enabled
Video BIOS Cacheable Disabled
** VGA Setting **
On-Chip Frame Buffer Size 8MB
Boot Type CRT
LCD Panel Type 1024x768 generic
Panel Scaling AUTO
BIA VBIOS Default
DRAM Timing Selectable
This option refers to the method by which the DRAM timing is selected.
The default is By SPD.
SLP_S4# Assertion Width
The default setting is 4 to 5 Sec.
System BIOS Cacheable
The setting of Enabled allows caching of the system BIOS ROM at
F000h-FFFFFh, resulting in better system performance. However, if
any program writes to this memory area, a system error may result.
Video BIOS Cacheable
The Setting Enabled allows caching of the video BIOS ROM at
C0000h-F7FFFh, resulting in better video performance. However, if
any program writes to this memory area, a system error may result. By
default, this field is disabled.
VGA Setting
The fields under the VGA Setting and their default settings are:
On-Chip Frame Buffer Size: 8MB
Boot Type: CRT
LCD Panel Type: 1024x768 generic
Panel Scaling: Auto
BIA: VBIOS Default