Table 3.2 pci connector j1 (back), Pci connector j1 (back) – Avago Technologies LSI21040 User Manual
Page 50
3-6
Specifying the Technical Characteristics
Table 3.2
PCI Connector J1 (Back)
Signal Name
Pin
Signal Name
Pin
Signal Name
Pin
Signal Name
Pin
TRST/
1
AD24
25
AD09
49
AD58
71
+12 V
2
IDSEL
26
KEYWAY
50
GND
72
TMS
3
+3.3 V
27
KEYWAY
51
AD56
73
TDI
4
AD22
28
C_BE0/
52
AD54
74
+5 V
5
AD20
29
+3.3 V
53
+3 V / +5 V
75
INTA/
6
GND
30
AD06
54
AD52
76
INTC/
7
AD18
31
AD04
55
AD50
77
+5 V
8
AD16
32
GND
56
GND
78
RESERVED
9
+3.3 V
33
AD02
57
AD48
79
+3 V / +5 V
10
FRAME/
34
AD00
58
AD46
80
RESERVED
11
GND
35
+3 V / +5 V
59
GND
81
KEYWAY
12
TRDY/
36
REQ64/
60
AD44
82
KEYWAY
13
GND
37
+5 V
61
AD42
83
RESERVED
14
STOP/
38
+5 V
62
+3 V / +5 V
84
RST/
15
+3.3 V
39
KEYWAY
xx
AD40
85
+3 V / +5 V
16
SDONE
40
KEYWAY
xx
AD38
86
GNT/
17
SBO/
41
GND
63
GND
87
GND
18
GND
42
C_BE7/
64
AD36
88
RESERVED
19
PAR
43
C_BE5/
65
AD34
89
AD30
20
AD15
44
+3 V / +5 V
66
GND
90
+3.3 V
21
+3.3 V
45
PAR64
67
AD32
91
AD28
22
AD13
46
AD62
68
RESERVED
92
AD26
23
AD11
47
GND
69
GND
93
GND
24
GND
48
AD60
70
RESERVED
94
Note: Highlighted signals are not connected.