Avago Technologies ACPL-7210-00RE - Manual (Page 4)

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Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.
AV02-4309EN - September 30, 2013
Figure 3. Schematic Diagram for ACSL-7210 Evaluation Board
VDD1
1
VI
2
NC
3
GND1
4
GND2
5
VO
6
NC
7
VDD2
8
U4
ACPL-077L
VDD1
1
VOA
2
VIB
3
GND1
4
GND2
5
VOB
6
VIA
7
VDD2
8
U1
ACSL-7210
AN
1
CA
3
GND
4
VO
5
VDD
6
U2
ACPL-M61L
RO
1
RE_
2
DE
3
DI
4
GND
5
A
6
B 7
VCC
8
U3
RS485 Trans
C1
100n
VDD2
C5
100n
C6
100n
C4
100n
R1
510
C2
100n
VDD2
VDD2
C3
100n
2
1
3 J1
R2
360
1
2 1
2
VDD1
VDD1
VDD1
VDD1 VDD2
TP1
TP2
TP3
TP4
TP5
TP6
1 2 J3
1 2 J2
2
1
3
J5
2
1
3
J4
VDD2
TP7
TP8
TP10 TP12
TP11 TP13
TP9
VDD1
GND1 VDD2
GND2
RX(485)/MISO(SPI_M)
TX(485)/MOSI(SPI_M)
TX_EN(485)/SCK(SPI_M)
SCK(SPI_S)
-(485)/MOSI(SPI_S)
+(485)/MISO(SPI_S)