Document Outline

• Features
• Applications
• General Description
• Basic Block Diagram
• Revision History
• Specifications
  • DC Specifications
  • AC Specifications
• Absolute Maximum Ratings
  • Thermal Resistance
  • ESD Caution
• Pin Configuration and Function Descriptions
• Typical Performance Characteristics
• Input/Output Termination Recommendations
• Theory of Operation
  • Overview
  • Direct Digital Synthesizer (DDS)
  • Digital-to-Analog (DAC) Output
  • Reconstruction Filter
  • FDBK_IN Inputs
  • SYSCLK Inputs
    • Functional Description
    • SYSCLK PLL Doubler
    • SYSCLK PLL Multiplier
    • External Loop Filter (SYSCLK PLL)
    • Detail of SYSCLK Differential Inputs
  • Output Clock Drivers and 2× Frequency Multiplier
    • Primary 1.8 V Differential HSTL Driver
    • 2× Frequency Multiplier
    • Single-Ended CMOS Output
    • CMOS Output Divider (S-Divider)
  • Harmonic Spur Reduction
• Thermal Performance
• Power-Up
  • Power-On Reset
  • Default Output Frequency on Power-Up
• Power Supply Partitioning
  • 3.3 V Supplies
    • DVDD_I/O (Pin 1) and AVDD3 (Pin 14)
    • AVDD3 (Pin 37)
    • AVDD3 (Pin 46, Pin 47, and Pin 49)
  • 1.8 V Supplies
    • DVDD (Pin 3, Pin 5, and Pin 7)
    • AVDD (Pin 11, Pin 19, Pin 23, Pin 24, Pin 36, Pin 42, Pin 44, and Pin 45)
    • AVDD (Pin 53)
    • AVDD (Pin 25, Pin 26, Pin 29, and Pin 30)
• Serial Control Port
  • Serial Control Port Pin Descriptions
  • Operation of Serial Control Port
    • Framing a Communication Cycle with CSB
    • Communication Cycle—Instruction Plus Data
    • Write
    • Read
  • The Instruction Word (16 Bits)
  • MSB/LSB First Transfers
• I/O Register Map
• I/O Register Descriptions
  • Serial Port Configuration (Register 0x0000 to Register 0x0005)
    • Register 0x0000—Serial Port Configuration
    • Register 0x0001—Reserved
    • Register 0x0002 and Register 0x0003—Part ID (Read-Only)
    • Register 0x0004—Serial Options
    • Register 0x0005—Serial Options (Self Clearing)
  • Power-Down and Reset (Register 0x0010 to Register 0x0013)
    • Register 0x0010—Power-Down and Enable
    • Register 0x0011—Reserved
    • Register 0x0012—Reset (Autoclearing)
    • Register 0x0013—Reset (Continued) (Not Autoclearing)
  • System Clock (Register 0x0020 to Register 0x0022)
    • Register 0x0020—N-Divider
    • Register 0x0021—Reserved
    • Register 0x0022—PLL Parameters
  • CMOS Output Divider (S-Divider) (Register 0x0100 to Register 0x0106)
    • Register 0x0100 to Register 0x0103—Reserved
    • Register 0x0104—S-Divider
    • Register 0x0105—S-Divider (Continued)
    • Register 0x0106—S-Divider (Continued)
  • Frequency Tuning Word (Register 0x01A0 to Register 0x01AD)
    • Register 0x01A0 to Register 0x01A5—Reserved
    • Register 0x01A6—FTW0 (Frequency Tuning Word)
    • Register 0x01A7—FTW0 (Frequency Tuning Word) (Continued)
    • Register 0x01A8—FTW0 (Frequency Tuning Word) (Continued)
    • Register 0x01A9—FTW0 (Frequency Tuning Word) (Continued)
    • Register 0x01AA—FTW0 (Frequency Tuning Word) (Continued)
    • Register 0x01AB—FTW0 (Frequency Tuning Word) (Continued)
    • Register 0x01AC—Phase
    • Register 0x01AD—Phase (Continued)
  • Doubler and Output Drivers (Register 0x0200 to Register 0x0201)
    • Register 0x0200—HSTL Driver
    • Register 0x0201—CMOS Driver
  • Calibration (User-Accessible Trim) (Register 0x0400 to Register 0x0410)
    • Register 0x0400 to Register 0x040A—Reserved
    • Register 0x040B—DAC Full-Scale Current
    • Register 0x040C—DAC Full-Scale Current (Continued)
    • Register 0x040D to Register 0x0410—Reserved
  • Harmonic Spur Reduction (Register 0x0500 to Register 0x0509)
    • Register 0x0500—Spur A
    • Register 0x0501—Spur A (Continued)
    • Register 0x0503—Spur A (Continued)
    • Register 0x0504—Spur A (Continued)
    • Register 0x0505—Spur B
    • Register 0x0506—Spur B (Continued)
    • Register 0x0508—Spur B (Continued)
    • Register 0x0509—Spur B (Continued)
• Outline Dimensions
  • Ordering Guide