Document Outline

• SCSI SCRIPTS™ Processors
  • Chapter1 Using the Programming Guide
    • 1.1 Product Overview
      • Table 1.1 Features and Functions of LSI53C7XX/8XX/10XX Family Chips (part 1) 
      • Table 1.2 Features and Functions of LSI53C7XX/8XX/10XX Family Chips (part 2) 
      • Figure1.1 Single Channel Block Diagram
      • Figure1.2 Dual Channel Block Diagram
    • 1.2 Benefits of Ultra, Ultra2, and Ultra3 SCSI
    • 1.3 System Overview
      • Figure1.3 Typical SCRIPTS Operation
  • Chapter2 Programming with SCRIPTS
    • 2.1 The SCSI SCRIPTS Processor
    • 2.2 SCRIPTS and the SCSI Bus Phases
      • Table 2.1 SCSI Protocol and SCRIPTS Instructions
    • 2.3 Assembling SCSI SCRIPTS
      • Figure2.1 Overview of Assembling SCSI SCRIPTS
    • 2.4 Using SCSI SCRIPTS
      • 2.4.1 SCRIPTS Data Sizes
        • Table 2.2 Data Sizes
      • 2.4.2 SCSI SCRIPTS Language Elements
        • Table 2.3 SCSI SCRIPTS Language Elements
      • 2.4.3 SCSI SCRIPTS Expressions
        • Table 2.4 Arithmetic Operators
        • Table 2.5 Bitwise Operators
      • 2.4.4 SCSI SCRIPTS Keywords
    • 2.5 Big and Little Endian Byte Addressing
      • Table 2.6 Big and Little Endian Byte Addressing
      • 2.5.1 SCRIPTS Instruction Sequence
      • 2.5.2 Operating Register Access from Firmware
      • 2.5.3 Operating Register Access from SCRIPTS Routines
      • 2.5.4 User Data Byte Ordering
  • Chapter3 The SCSI SCRIPTS Processor Instruction Set
    • 3.1 Overview of SCRIPTS Instructions
      • 3.1.1 I/O Instructions
        • Table 3.1 Opcode Bit Options
      • 3.1.2 Memory Move Instructions
      • 3.1.3 Transfer Control Instructions
      • 3.1.4 Read/Write Instructions
        • Table 3.2 Read/Write Instructions
      • 3.1.5 Block Move Instructions
      • 3.1.6 Load and Store Instructions
    • 3.2 Instruction Descriptions
      • Table 3.3 SCRIPTS Instructions Set
      • 3.2.1 CALL
        • Figure3.1 CALL Format
        • Table 3.4 SCSI Phase Bit Values (CALL Format)
        • Figure3.2 Use of the Mask Keyword
      • 3.2.2 CHMOV
        • Figure3.3 CHMOV Format
        • Table 3.5 SCSI Phase Bit Values (CHMOV Format)
      • 3.2.3 CLEAR
        • Figure3.4 CLEAR Format
      • 3.2.4 DISCONNECT
        • Figure3.5 DISCONNECT Format
      • 3.2.5 INT
        • Figure3.6 INT Format
        • Table 3.6 SCSI Phase Bit Values (INT Format)
      • 3.2.6 INTFLY
        • Figure3.7 INTFLY Format
        • Table 3.7 SCSI Phase Bit Values (INTFLY Format)
      • 3.2.7 JUMP
        • Figure3.8 JUMP Format
        • Table 3.8 SCSI Phase Bit Values (JUMP Format)
      • 3.2.8 JUMP 64
        • Figure3.9 JUMP 64 Format
        • Table 3.9 SCSI Phase Bit Values (JUMP 64 Format)
      • 3.2.9 LOAD
        • Figure3.10 LOAD Format
        • Table 3.10 Register Address Field Definitions (LOAD Format)
      • 3.2.10 LOAD64
        • Table 3.11 LOAD64 Format
        • Table 3.12 Register Address Field Definitions (LOAD64 Format)
      • 3.2.11 MOVE
        • Figure3.11 MOVE Format
        • Table 3.13 SCSI Phase Bit Values (MOVE Format)
      • 3.2.12 MOVE MEMORY
        • Figure3.12 MOVE MEMORY Format
      • 3.2.13 MOVE REGISTER
        • Figure3.13 MOVE REGISTER Format
      • 3.2.14 NOP
        • Figure3.14 NOP Format
      • 3.2.15 RESELECT
        • Figure3.15 RESELECT Format
        • Figure3.16 Reselection Instruction
      • 3.2.16 RETURN
        • Figure3.17 RETURN Format
        • Table 3.14 SCSI Phase Bit Values (RETURN Format)
      • 3.2.17 SELECT
        • Figure3.18 SELECT Format
      • 3.2.18 SET
        • Figure3.19 SET Format
      • 3.2.19 STORE
        • Figure3.20 STORE Format
        • Table 3.15 Low Order Bit Options
      • 3.2.20 WAIT DISCONNECT
        • Figure3.21 WAIT DISCONNECT Format
      • 3.2.21 WAIT SELECT
        • Figure3.22 WAIT SELECT Format
      • 3.2.22 WAIT RESELECT
        • Figure3.23 WAIT RESELECT Format
        • Figure3.24 WAIT RESELECT and the SIGP Bit
    • 3.3 Instruction Examples
      • 3.3.1 I/O Instruction Example
        • Figure3.25 I/O Instruction Type
      • 3.3.2 Memory Move Instruction Example
        • Figure3.26 Memory Move Instruction Part 1
        • Figure3.27 Memory Move Instruction Part 2
      • 3.3.3 Transfer Control Instruction Example
        • Figure3.28 Transfer Control Instruction
      • 3.3.4 Read/Write Instruction Example
        • Figure3.29 Read/Write Instruction Example
      • 3.3.5 Block Move Instruction Example
        • Figure3.30 Block Move Instruction
      • 3.3.6 Load/Store Instruction Example
        • Figure3.31 Load/Store Instruction
  • Chapter4 Using the LSI Logic Assembler NASM™
    • 4.1 Overview
    • 4.2 Using NASM
    • 4.3 Command Line Options
      • 4.3.1 Architecture
      • 4.3.2 Binary Cross Reference Values
      • 4.3.3 Error Listing File
      • 4.3.4 Listing File
      • 4.3.5 Output File
      • 4.3.6 Partial “C” Source
      • 4.3.7 .BIN Output
      • 4.3.8 Omit Termination Record
      • 4.3.9 Verbose Messages
      • 4.3.10 Patch Offsets
    • 4.4 Example Assembler Command Lines
    • 4.5 How NASM Parses SCRIPTS Files
    • 4.6 Assembler Declarative Keywords
      • Table 4.1 Keywords
      • 4.6.1 ABSOLUTE
      • 4.6.2 ARCH
      • 4.6.3 ENTRY
      • 4.6.4 EXTERN
      • 4.6.5 PASS
      • 4.6.6 PROC
      • 4.6.7 RELATIVE
      • 4.6.8 TABLE
    • 4.7 Conditional Keywords
      • 4.7.1 IF
      • 4.7.2 WHEN
    • 4.8 Logical Keywords
      • 4.8.1 NOT
      • 4.8.2 AND
      • 4.8.3 OR
    • 4.9 Flag Fields
      • 4.9.1 ACK
      • 4.9.2 ATN
      • 4.9.3 TARGET
      • 4.9.4 CARRY
    • 4.10 Qualifier Keywords
      • 4.10.1 DSAREL
      • 4.10.2 FROM
      • 4.10.3 MASK
      • 4.10.4 MEMORY
      • 4.10.5 PTR
      • 4.10.6 REG
      • 4.10.7 REL
      • 4.10.8 TO
      • 4.10.9 WITH
      • 4.10.10 NOFLUSH
    • 4.11 Other Keywords
      • 4.11.1 Action Keywords
      • 4.11.2 SCSI Phases
      • 4.11.3 Register Names
  • Chapter5 The NASM Output File
    • 5.1 NASM Output Overview
      • Figure5.1 Sample SCRIPTS Program
    • 5.2 NASM Output File Examples
      • 5.2.1 SCRIPTS Array
        • Table 5.1 Relationship Between Entry and PROC Statements and Output File
      • 5.2.2 External
      • 5.2.3 Relative
      • 5.2.4 Entry
      • 5.2.5 Label Patches
      • 5.2.6 Absolute
      • 5.2.7 Termination Record
  • Chapter6 Using the Registers to Control Chip Operations
    • 6.1 Overview
    • 6.2 SCSI Registers
      • Table 6.1 SCSI Registers
    • 6.3 DMA Registers
      • Table 6.2 DMA Registers
    • 6.4 SCRIPTS Registers
      • Table 6.3 SCRIPTS Registers
    • 6.5 64-Bit SCRIPTS Selector Registers
      • Table 6.4 64-Bit Selector Registers
    • 6.6 Interrupt Registers
      • Table 6.5 Interrupt Registers
    • 6.7 Phase Mismatch Registers
      • Table 6.6 Phase Mismatch Registers
    • 6.8 Test and Miscellaneous Registers
      • Table 6.7 Test and Miscellaneous Registers
    • 6.9 General Purpose Registers
      • Table 6.8 General Purpose Registers
    • 6.10 Register Initialization
      • Table 6.9 LSI53C815/810A/860 Startup Bits
      • Table 6.10 LSI53C825A/875/876/885/895/895A/896/10XX Startup Bits
  • Chapter7 Integrating SCRIPTS Programs into “C” Language Drivers
    • 7.1 Initializing the SCRIPTS Processor
      • Figure7.1 Accessing I/O Mapped Registers
      • 7.1.1 Reset
        • Figure7.2 Resetting the SCRIPTS Processor
      • 7.1.2 Table Indirect Operations
        • Figure7.3 SCRIPTS Table Declaration
        • Figure7.4 Creating Table Indirect Entry Offsets
        • Figure7.5 Data Structure and Type Definition
        • Figure7.6 Data Structure and Type Definition
        • Figure7.7 Creating Buffers
    • 7.2 Patching
      • 7.2.1 EXTERN Buffers
      • 7.2.2 RELATIVE Buffers
      • 7.2.3 ABSOLUTE Values
      • 7.2.4 Buffer Addresses
      • 7.2.5 Byte Counts
      • 7.2.6 Absolute JUMP/CALL Addresses
      • 7.2.7 Entry Locations
      • 7.2.8 Self-Modifying SCRIPTS Code
        • Figure7.8 Self-Modifying Code
    • 7.3 Running a SCRIPTS Program
      • Figure7.9 General.ss SCRIPTS Source File
      • Figure7.10 General.out NASM Output File
  • Chapter8 Writing Device Drivers with SCRIPTS
    • 8.1 Device Driver Overview
      • Figure8.1 The Role of the SCSI Device Drivers
      • Figure8.2 SCSI Device Driver Layers
    • 8.2 Command Block
    • 8.3 Power Up Example
      • Figure8.3 Power Up Examples
    • 8.4 I/O Request Process
      • Figure8.4 I/O Operation
    • 8.5 How to Write a Device Driver with SCRIPTS
    • 8.6 Table Indirect Addressing
      • 8.6.1 Block Move Instructions
        • Table 8.1 Data Structure
      • 8.6.2 Select/Reselect Instructions
        • Table 8.2 I/O Data Structure
        • Figure8.5 Table Indirect Addressing
      • 8.6.3 Defining a Table
        • Figure8.6 Table Definitions
    • 8.7 Relative Addressing
  • Chapter9 SCRIPTS Programming Topics
    • 9.1 Scatter/Gather Operations
      • Figure9.1 Scatter/Gather Operation
      • Figure9.2 Alternate Scatter/Gather Operation
    • 9.2 Loopback Mode
      • 9.2.1 Loopback Example – Selection
        • Figure9.3 Loopback Mode
        • Figure9.4 Target Operation
        • Figure9.5 Byte Transfer
        • Figure9.6 Loopback Mode Selection Procedure
    • 9.3 Byte Recovery on Target Disconnect
      • 9.3.1 Saving the Processor State
      • 9.3.2 Updating the SCRIPTS Program
      • 9.3.3 Cleaning Up
      • 9.3.4 Example Byte Recovery Code
        • Figure9.7 SCRIPTS Sequence to Move Data
        • Figure9.8 Example Function for Handling DATA IN Phase Mismatch Interrupts
        • Figure9.9 Example Function for Handling DATA OUT Phase Mismatch Interrupts
    • 9.4 Synchronous Negotiation and Transfer
      • Figure9.10 SELECT FROM Example Code
    • 9.5 Interrupt Handling
      • 9.5.1 Polling and Hardware Interrupts
      • 9.5.2 Registers
      • 9.5.3 Fatal vs. Nonfatal Interrupts
      • 9.5.4 Masking
      • 9.5.5 Stacked Interrupts
      • 9.5.6 Halting in an Orderly Fashion
      • 9.5.7 Sample Interrupt Service Routine
    • 9.6 Migrating Existing Software to Ultra, Ultra2, and Ultra3 SCSI
      • 9.6.1 Clock Divider Bits
      • 9.6.2 Ultra Enable Bit
      • 9.6.3 Loading the New Register Values
      • 9.6.4 Negotiating Synchronous Transfers
      • 9.6.5 Using the SCSI Clock Doubler
      • 9.6.6 Using the SCSI Clock Quadrupler
    • 9.7 Using the SCRIPTS RAM
      • 9.7.1 Loading SCRIPTS RAM
        • Figure9.11 Storing Data Structures in SCRIPTS RAM
      • 9.7.2 Programming Techniques when Using SCRIPTS RAM
        • Figure9.12 External Script (SCRIPTS.LIS file)
        • Figure9.13 External Script (SCRIPTS.OUT file)
        • Figure9.14 Internal Script (SCRIPTS.LIS file)
        • Figure9.15 Internal SCRIPTS Program (SCRIPTS.OUT file)
      • 9.7.3 Patching Internal and External SCRIPTS Programs
        • Figure9.16 Patching Routine
  • Chapter10 Multithreaded I/O
    • 10.1 Overview
      • Figure10.1 Multithreaded System Operation
    • 10.2 Multithreaded Operations Flow
      • Figure10.2 Multithreaded SCRIPTS Operational Flow
    • 10.3 SCRIPTS Areas
    • 10.4 Multithreaded SCRIPTS Example
      • Figure10.3 Multithreaded SCRIPTS Example Step 1
      • Figure10.4 Multithreaded SCRIPTS Example Step 2
      • Figure10.5 Multithreaded SCRIPTS Example Step 3
      • Figure10.6 Multithreaded SCRIPTS Example Step 6
      • Figure10.7 Multithreaded SCRIPTS Example Step 10
      • Figure10.8 Multithreaded SCRIPTS Example Step 11
      • Figure10.9 Multithreaded SCRIPTS Example Step 13
    • 10.5 Using the SIGP Bit to Abort an Instruction
      • Figure10.10 Sample SIGP Code
    • 10.6 I/O Completion
  • Chapter11 Using the SCRIPTS Processor in Target Applications
    • 11.1 SCSI and Target SCRIPTS Protocol
      • Table 11.1 SCSI Protocol and Target SCRIPTS Instructions
    • 11.2 Registers Used for Target Operation
      • Table 11.2 Register Bits Used for Target Operation
    • 11.3 Using SCRIPTS for Target Operation
      • 11.3.1 Sample Target Operation SCRIPTS Program
        • Figure11.1 SCRIPTS Source Code–Comments
        • Figure11.2 SCRIPTS Source Code–ABSOLUTE Declarations
        • Figure11.3 SCRIPTS Source Code–EXTERN Variables
        • Figure11.4 SCRIPTS Source Code–TABLE
        • Figure11.5 SCRIPTS Source Code–ENTRY Declarations
        • Figure11.6 SCRIPTS Source Code–wait_select Label
        • Figure11.7 SCRIPTS Source Code–CDB Functions
        • Figure11.8 SCRIPTS Source Code–Message Out Phase
        • Figure11.9 SCRIPTS Source Code–Extended Message
        • Figure11.10 SCRIPTS Source Code–Synchronous Negotiation
        • Figure11.11 SCRIPTS Source Code–Wide Negotiation
        • Figure11.12 SCRIPTS Source Code–Return Negotiation
        • Figure11.13 SCRIPTS Source Code–Recovery Message
        • Figure11.14 SCRIPTS Source Code–Test Unit Ready
        • Figure11.15 SCRIPTS Source Code–stopped_busy_tur Command
        • Figure11.16 SCRIPTS Source Code–Request Sense
        • Figure11.17 SCRIPTS Source Code–Read Label
        • Figure11.18 SCRIPTS Source Code–read_disconnect Label
        • Figure11.19 SCRIPTS Source Code–read_reconnect Label
        • Figure11.20 SCRIPTS Source Code–Write
        • Figure11.21 SCRIPTS Source Code–write_disconnect Label
        • Figure11.22 SCRIPTS Source Code–write_reconnect Label
        • Figure11.23 SCRIPTS Source Code–reserve_unit Label
        • Figure11.24 SCRIPTS Source Code–release_unit Command
        • Figure11.25 SCRIPTS Source Code–abort Label
        • Figure11.26 SCRIPTS Source Code–stopped_busy_wait_select Command
    • 11.4 Synchronous Negotiation by a Target Device
  • Chapter12 Debugging the SCRIPTS Processor
    • 12.1 Chip Debugging Guidelines
    • 12.2 Register Used for Debugging
  • Chapter13 New SCRIPTS Processor Features
    • 13.1 Improved FIFO Flushing
    • 13.2 Larger FIFO
    • 13.3 New ISTAT Registers
      • Table 13.1 ISTAT1 Register
    • 13.4 New Scratch Registers
    • 13.5 New Load/Store Feature
    • 13.6 Phase Mismatch Handling
      • 13.6.1 Control Bits
      • 13.6.2 Registers
      • 13.6.3 SCRIPTS Example
    • 13.7 64-Bit SCRIPTS Addressing
      • 13.7.1 Control Bits
      • 13.7.2 Block Move
      • 13.7.3 Direct Block Move
        • Figure13.1 64-Bit Direct Block Move Format
      • 13.7.4 Mode 0 Table Indirect Block Move
      • 13.7.5 Mode 1 Table Indirect Block Move
        • Table 13.2 Index Mapping
        • Figure13.2 Index Mode 1 Table Entry Format
      • 13.7.6 Table Indirect Block Move Summary
        • Table 13.3 Table Indirect BMOV Upper 32-Bit Address Locations
      • 13.7.7 LSI53C1010/LSI53C1010R
  • AppendixA NASM Error Messages
    • TableA.1 NASM Error Messages
    • TableA.2 Fatal Errors
    • TableA.3 Warnings
  • AppendixB Multithreaded SCRIPTS Example
  • AppendixC Glossary of Terms and Abbreviations
  • Index
  • Customer Feedback