Document Outline

• Welcome
• Audience
• Related Documentation
  • Related Altera Product Documentation
  • Related devboards.de Product Documentation
• FTXL Hardware Overview
  • Overview
  • The FTXL Developer’s Kit
  • The FTXL Development Process
    • Hardware Design
    • FPGA Design
    • Software Design
• FTXL Developer’s Kit Hardware
  • Overview of the FTXL Developer’s Kit Hardware
  • The DBC2C20 Development Board
    • Buttons and LEDs
    • Jumper Settings
    • Connectors and Headers
  • The FTXL Adapter Board
    • Jumper Settings
    • Connectors and Headers
  • The FTXL Transceiver Board
    • LEDs
    • Jumper Settings
    • Connectors and Headers
• FTXL Transceiver Hardware Interface
  • Overview of the Hardware Interface
    • DC-DC Converter
    • Control Signal Buffer
    • Data Bus Isolation
    • Pull-Up Resistors for Communications Lines
  • The Parallel Communications Interface
    • Token Passing and Handshaking
    • Transferring Data
  • FTXL Transceiver Pin Characteristics
    • I/O Pins
    • IRQ Pin
    • Reset Pin
    • Service Pin
    • Clock Pins
  • FPGA Pin Assignments for the FTXL Transceiver
  • Control Flow: Host Receiving Data from the FTXL Transceiver
  • Control Flow: Host Sending Data to the FTXL Transceiver
• FPGA Design for the FTXL Transceiver
  • Overview
  • Using the Reference Design
  • Developing a New FPGA Design
    • FPGA Device Requirements
    • Nios II Processor
    • FPGA Configuration Device
    • FTXL Components
    • Phase-Locked Loop
    • DBC2C20 Components
    • Timers
    • External Memory
    • Addressing, Size, and IRQ Requirements
  • FTXL Hardware Abstraction Layer
  • Other Hardware Design Considerations
• Working with the Altera Development Environments
  • Development Tools
  • Using a Device Programmer for the FPGA Device
  • Setting Component Search Paths
  • Adding FTXL Components to an Existing Design
    • Modifying the SOPC Builder Design
    • Modifying the Quartus II Design
  • Building the Application Image
  • Loading the Application Image into the FPGA Device
• Using the Bring-Up Application to Verify FTXL Hardware Design
  • Overview
    • Application Framework
    • Interrupt Functions from the FTXL HAL
  • FTXL Transceiver Interface
    • Reset Signal
    • Status Signals
    • Data Register
    • Interrupt
  • Working with the Nios IDE for the Bring-Up Application
    • Creating a New Application Project
    • Building the Application Image
    • Running the Application from the Nios IDE
  • Running the Tests
    • Reset Test
    • Token Passing Test
    • Data Passing Test
    • Interrupt Test
    • Service Pin and LED Test
  • Designing Additional Tests
• Index