Document Outline

• Features
• Description
  • Block Diagram
  • Pin Descriptions
    • VCC
    • GND
    • Port A (PA6..PA0)
    • INT1, 0
    • ADIN5..0
    • RESET
    • XTAL1
    • XTAL2
    • AVCC
    • AGND
  • Crystal Oscillators
• Architectural Overview
  • General-purpose Register File
    • X-register, Y-register and Z-register
  • ALU – Arithmetic Logic Unit
  • Programmable Flash Program Memory
  • SRAM Data Memory
  • Program and Data Addressing Modes
    • Register Direct, Single Register Rd
    • Register Direct, Two Registers Rd And Rr
    • I/O Direct
    • Data Direct
    • Data Indirect with Displacement
    • Data Indirect
    • Data Indirect with Pre-decrement
    • Data Indirect with Post-increment
    • Constant Addressing Using the LPM Instruction
    • Indirect Program Addressing, IJMP and ICALL
    • Relative Program Addressing, RJMP And RCALL
  • EEPROM Data Memory
  • Memory Access Times and Instruction Execution Timing
  • I/O Memory
    • Status Register – SREG
    • Stack Pointer – SP
  • Reset and Interrupt Handling
    • Reset
    • External reset
    • Interrupt Handling
    • General Interrupt Mask Register – GIMSK
    • General Interrupt Flag Register – GIFR
    • General Interrupt Pin Register – GIPR
    • Timer/Counter Interrupt Mask Register – TIMSK
    • Timer/Counter Interrupt Flag Register – TIFR
    • External Interrupts
    • Interrupt Response Time
    • MCU Control Register – MCUCR
  • Sleep Modes
    • Idle Mode
    • Power-down Mode
• Timer/Counters
  • Timer/Counter Prescaler
  • 8-bit Timer/Counter0
    • Timer/Counter0 Control Register – TCCR0
    • Timer Counter0 – TCNT0
  • 16-bit Timer/Counter1
    • Timer/Counter1 Control Register – TCCR1
    • Timer/Counter1 – TCNT1H AND TCNT1L
    • TCNT1 Timer/Counter1 Write:
    • TCNT1 Timer/Counter1 Read:
• EEPROM Read/Write Access
  • EEPROM Address Register – EEARH and EEARL
  • EEPROM Data Register – EEDR
  • EEPROM Control Register – EECR
  • Prevent EEPROM Corruption
• Analog-to-digital Converter
  • Operation
  • Prescaling
  • ADC Noise Canceler Function
    • ADC Multiplexer Select Register – ADMUX
    • ADC Control and Status Register – ADCSR
    • ADC Data Register – ADCL AND ADCH
  • Scanning Multiple Channels
  • ADC Noise Canceling Techniques
  • ADC Characteristics
• Output Port A
  • Port A Data Register – PORTA
  • Port A Data Direction Register – DDRA
• Memory Programming
  • Program and Data Memory Lock Bits
  • Signature Bytes
  • Programming the Flash and EEPROM
  • Parallel Programming
    • Signal Names
    • Enter Programming Mode
    • Chip Erase
    • Programming the Flash
    • Reading the Flash
    • Programming the EEPROM
    • Reading the EEPROM
    • Programming the Lock Bits
    • Reading the Lock Bits
    • Reading the Signature Bytes
  • Parallel Programming Characteristics
• Electrical Characteristics
  • Absolute Maximum Ratings*
  • DC Characteristics
  • External Clock Drive Waveforms
  • External Clock Drive
• Typical Characteristics
• AT90C8534 Register Summary
• Instruction Set Summary
• Ordering Information