Document Outline

• Features
• Description
• Block Diagram
• Pin Configuration
  • I/O Configurations
  • Port Structure
  • Read-Modify-Write Instructions
  • Quasi-bidirectional Port Operation
• SFR Mapping
• Clock
  • Description
  • Register
• Power Management
  • Introduction
  • Reset
  • Reset Recommendation to Prevent Flash Corruption
  • Idle Mode
  • Power-down Mode
  • Registers
• Data Memory
  • Internal Space
  • Dual Data Pointer
  • Registers
• EEPROM Data Memory
  • Write Data in the Column Latches
  • Programming
  • Read Data
  • Examples
  • Registers
• Program/Code Memory
  • Flash Memory Architecture
  • Overview of FM0 Operations
  • Registers
• In-System Programming (ISP)
  • Flash Programming and Erasure
  • Boot Process
  • Application Programming Interface
  • XROW Bytes
  • Hardware Security Byte
• Serial I/O Port
  • Framing Error Detection
  • Automatic Address Recognition
  • Given Address
  • Broadcast Address
  • Registers
• Timers/Counters
  • Timer/Counter Operations
  • Timer 0
  • Timer 1
  • Interrupt
  • Registers
• Timer 2
  • Auto-reload Mode
  • Programmable Clock- Output
  • Registers
• WatchDog Timer
  • WatchDog Programming
• WatchDog Timer during Power-down Mode and Idle
  • Register
• Programmable Counter Array (PCA)
  • PCA Timer
  • PCA Modules
  • PCA Interrupt
  • PCA Capture Mode
  • 16-bit Software Timer Mode
  • High Speed Output Mode
  • Pulse Width Modulator Mode
  • PCA Registers
• Analog-to-Digital Converter (ADC)
  • Features
  • ADC Port1 I/O Functions
  • ADC Converter Operation
  • Voltage Conversion
  • Clock Selection
  • ADC Standby Mode
  • IT ADC Management
  • Routine Examples
  • Registers
• Interrupt System
  • Introduction
  • Registers
• Electrical Characteristics
  • Absolute Maximum Ratings
  • DC Parameters for Standard Voltage
  • DC Parameters for A/D Converter
  • AC Parameters
• Ordering Information
• Package Drawing
  • PLCC28
• Package Drawing
  • SOIC28
• Package Drawing
  • VQFP32
• Table of Contents